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maze
2026-03-25 18:14:45 +01:00
commit d074cd2e43
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6
boards/heltec/heltec_meshpocket/Kconfig.defconfig Normal file
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if BOARD_HELTEC_MESHPOCKET
config BOARD
default "heltec_meshpocket"
endif # BOARD_HELTEC_MESHPOCKET

2
boards/heltec/heltec_meshpocket/Kconfig.heltec_meshpocket Normal file
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config BOARD_HELTEC_MESHPOCKET
select SOC_NRF52840_QIAA

2
boards/heltec/heltec_meshpocket/board.cmake Normal file
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# Heltec MeshPocket — board.cmake
include(${ZEPHYR_BASE}/boards/nordic/common/board.cmake)

7
boards/heltec/heltec_meshpocket/board.yml Normal file
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board:
name: heltec_meshpocket
full_name: "Heltec MeshPocket"
vendor: heltec
url: https://heltec.org/project/mesh-pocket/
socs:
- name: nrf52840

47
boards/heltec/heltec_meshpocket/heltec_meshpocket-pinctrl.dtsi Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec MeshPocket — pin control definitions
* SoC: nRF52840-QIAA
*/
#include <nordic/nrf52840.dtsi>
#include <dt-bindings/pinctrl/nrf-pinctrl.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 8)>;
bias-pull-up;
};
};
uart0_sleep: uart0_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 6)>,
<NRF_PSEL(UART_RX, 0, 8)>;
low-power-enable;
};
};
/* SPI1 for SX1262 */
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
<NRF_PSEL(SPIM_MOSI, 0, 27)>,
<NRF_PSEL(SPIM_MISO, 0, 28)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 26)>,
<NRF_PSEL(SPIM_MOSI, 0, 27)>,
<NRF_PSEL(SPIM_MISO, 0, 28)>;
low-power-enable;
};
};
};

96
boards/heltec/heltec_meshpocket/heltec_meshpocket.dts Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec MeshPocket — Device Tree Source
* SoC: nRF52840-QIAA
* Radio: SX1262 (crystal oscillator, no TCXO)
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "heltec_meshpocket-pinctrl.dtsi"
/ {
model = "Heltec MeshPocket";
compatible = "heltec,meshpocket";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,code-partition = &slot0_partition;
};
aliases {
lora0 = &lora;
};
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart0 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-1 = <&uart0_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
lora: lora@0 {
compatible = "semtech,sx1262";
reg = <0>;
spi-max-frequency = <1000000>;
reset-gpios = <&gpio0 21 GPIO_ACTIVE_LOW>;
busy-gpios = <&gpio1 3 GPIO_ACTIVE_HIGH>;
dio1-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
dio2-tx-enable;
};
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
storage_partition: partition@da000 {
label = "storage";
reg = <0x000da000 0x00006000>;
};
};
};

7
boards/heltec/heltec_meshpocket/heltec_meshpocket_defconfig Normal file
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CONFIG_SOC_SERIES_NRF52X=y
CONFIG_BOARD_HELTEC_MESHPOCKET=y
CONFIG_FLASH=y
CONFIG_FLASH_MAP=y
CONFIG_UART_CONSOLE=y
CONFIG_SPI=y
CONFIG_GPIO=y

6
boards/heltec/heltec_t114/Kconfig.defconfig Normal file
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if BOARD_HELTEC_T114
config BOARD
default "heltec_t114"
endif # BOARD_HELTEC_T114

2
boards/heltec/heltec_t114/Kconfig.heltec_t114 Normal file
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config BOARD_HELTEC_T114
select SOC_NRF52840_QIAA

7
boards/heltec/heltec_t114/board.cmake Normal file
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# Heltec T114 — board.cmake
# Uses nrfjprog or pyocd for flashing via SWD.
# The board exposes a SWD header for programming.
board_runner_args(nrfjprog "--nrf-family=NRF52")
board_runner_args(pyocd "--target=nrf52840")
include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
include(${ZEPHYR_BASE}/boards/common/pyocd.board.cmake)

7
boards/heltec/heltec_t114/board.yml Normal file
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board:
name: heltec_t114
full_name: "Heltec Mesh Node T114"
vendor: heltec
url: https://heltec.org/project/mesh-node-t114/
socs:
- name: nrf52840

46
boards/heltec/heltec_t114/heltec_t114-pinctrl.dtsi Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec T114 — pin control definitions
*/
#include <nordic/nrf52840.dtsi>
#include <dt-bindings/pinctrl/nrf-pinctrl.h>
&pinctrl {
uart1_default: uart1_default {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 10)>;
};
group2 {
psels = <NRF_PSEL(UART_RX, 0, 9)>;
bias-pull-up;
};
};
uart1_sleep: uart1_sleep {
group1 {
psels = <NRF_PSEL(UART_TX, 0, 10)>,
<NRF_PSEL(UART_RX, 0, 9)>;
low-power-enable;
};
};
/* SPI1 for LR1110 */
spi1_default: spi1_default {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 22)>,
<NRF_PSEL(SPIM_MISO, 0, 23)>;
};
};
spi1_sleep: spi1_sleep {
group1 {
psels = <NRF_PSEL(SPIM_SCK, 0, 19)>,
<NRF_PSEL(SPIM_MOSI, 0, 22)>,
<NRF_PSEL(SPIM_MISO, 0, 23)>;
low-power-enable;
};
};
};

115
boards/heltec/heltec_t114/heltec_t114.dts Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec Mesh Node T114 — Device Tree Source
* SoC: nRF52840 QIAAVariant
* Radio: SX1262
*
* NOTE: GPIO pin numbers are placeholders. Verify against the T114
* schematic/documentation before using with real hardware.
* The T114 uses the nRF52840 SoC in a similar form factor to the
* RAK4631, but with different GPIO assignments.
*/
/dts-v1/;
#include <nordic/nrf52840_qiaa.dtsi>
#include "heltec_t114-pinctrl.dtsi"
/ {
model = "Heltec Mesh Node T114";
compatible = "heltec,mesh-node-t114";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,code-partition = &slot0_partition;
};
aliases {
lora0 = &lora;
led0 = &led0;
};
leds {
compatible = "gpio-leds";
led0: led_0 {
/* TODO: verify LED GPIO from T114 schematic */
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
label = "LED 0";
};
};
};
&uicr {
gpio-as-nreset;
};
&gpiote {
status = "okay";
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&uart1 {
compatible = "nordic,nrf-uarte";
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart1_default>;
pinctrl-1 = <&uart1_sleep>;
pinctrl-names = "default", "sleep";
};
&spi1 {
compatible = "nordic,nrf-spim";
status = "okay";
pinctrl-0 = <&spi1_default>;
pinctrl-names = "default";
lora: lora@0 {
compatible = "semtech,sx1262";
reg = <0>;
spi-max-frequency = <1000000>;
reset-gpios = <&gpio0 25 GPIO_ACTIVE_LOW>;
busy-gpios = <&gpio0 17 GPIO_ACTIVE_HIGH>;
dio1-gpios = <&gpio0 20 GPIO_ACTIVE_HIGH>;
dio2-tx-enable;
dio3-tcxo-voltage = <SX126X_DIO3_TCXO_3V3>;
tcxo-power-startup-delay-ms = <5>;
};
};
zephyr_udc0: &usbd {
compatible = "nordic,nrf-usbd";
status = "okay";
};
&flash0 {
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x0000C000>;
};
slot0_partition: partition@c000 {
label = "image-0";
reg = <0x0000C000 0x00067000>;
};
slot1_partition: partition@73000 {
label = "image-1";
reg = <0x00073000 0x00067000>;
};
storage_partition: partition@da000 {
label = "storage";
reg = <0x000da000 0x00006000>;
};
};
};

8
boards/heltec/heltec_t114/heltec_t114_defconfig Normal file
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CONFIG_SOC_NRF52840_QIAA=y
CONFIG_BOARD_HELTEC_T114=y
CONFIG_FLASH=y
CONFIG_FLASH_MAP=y
CONFIG_GPIO=y
CONFIG_SPI=y
CONFIG_USB_DEVICE_STACK=y
CONFIG_NRFX_POWER=y

6
boards/heltec/heltec_wifi_lora32_v3/Kconfig.defconfig Normal file
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if BOARD_HELTEC_WIFI_LORA32_V3
config BOARD
default "heltec_wifi_lora32_v3"
endif # BOARD_HELTEC_WIFI_LORA32_V3

3
boards/heltec/heltec_wifi_lora32_v3/Kconfig.heltec_wifi_lora32_v3 Normal file
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config BOARD_HELTEC_WIFI_LORA32_V3
select SOC_ESP32S3_PROCPU if BOARD_HELTEC_WIFI_LORA32_V3_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_HELTEC_WIFI_LORA32_V3_APPCPU

3
boards/heltec/heltec_wifi_lora32_v3/board.cmake Normal file
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# Heltec WiFi LoRa 32 V3 — board.cmake
# Uses esptool for flashing over CP2102 USB-UART bridge
include(${ZEPHYR_BASE}/boards/espressif/common/board.cmake)

10
boards/heltec/heltec_wifi_lora32_v3/board.yml Normal file
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board:
name: heltec_wifi_lora32_v3
full_name: "Heltec WiFi LoRa 32 V3"
vendor: heltec
url: https://heltec.org/project/wifi-lora-32-v3/
socs:
- name: esp32s3
variants:
- name: procpu
- name: appcpu

34
boards/heltec/heltec_wifi_lora32_v3/heltec_wifi_lora32_v3-pinctrl.dtsi Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec WiFi LoRa 32 V3 — pin control definitions
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
uart0_default: uart0_default {
group1 {
pinmux = <UART0_TX_GPIO43>;
output-enable;
};
group2 {
pinmux = <UART0_RX_GPIO44>;
bias-pull-up;
};
};
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO11>,
<SPIM2_SCLK_GPIO9>,
<SPIM2_CSEL_GPIO8>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO10>;
output-enable;
};
};
};

109
boards/heltec/heltec_wifi_lora32_v3/heltec_wifi_lora32_v3_procpu.dts Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec WiFi LoRa 32 V3 — Device Tree Source (PROCPU)
*
* SoC: ESP32-S3
* Radio: SX1262
* Console: UART0 via CP2102 USB-UART bridge (GPIO43=TX, GPIO44=RX)
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_fn8r2.dtsi>
#include "heltec_wifi_lora32_v3-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Heltec WiFi LoRa 32 V3 PROCPU";
compatible = "heltec,wifi-lora-32-v3";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &uart0;
zephyr,shell-uart = &uart0;
zephyr,flash-controller = &flash;
};
aliases {
lora0 = &lora;
led0 = &led_white;
};
leds {
compatible = "gpio-leds";
led_white: led_0 {
gpios = <&gpio0 35 GPIO_ACTIVE_HIGH>;
label = "White LED";
};
};
buttons {
compatible = "gpio-keys";
boot_button: button_0 {
gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Boot Button";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&uart0 {
status = "okay";
current-speed = <115200>;
pinctrl-0 = <&uart0_default>;
pinctrl-names = "default";
};
&spi2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
lora: lora@0 {
compatible = "semtech,sx1262";
reg = <0>;
spi-max-frequency = <4000000>;
reset-gpios = <&gpio0 12 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
busy-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
dio1-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
dio2-tx-enable;
tcxo-power-startup-delay-ms = <5>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00300000>;
};
slot1_partition: partition@310000 {
label = "image-1";
reg = <0x00310000 0x00300000>;
};
storage_partition: partition@610000 {
label = "storage";
reg = <0x00610000 0x001f0000>;
};
};
};

7
boards/heltec/heltec_wifi_lora32_v3/heltec_wifi_lora32_v3_procpu_defconfig Normal file
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CONFIG_SOC_SERIES_ESP32S3=y
CONFIG_BOARD_HELTEC_WIFI_LORA32_V3=y
CONFIG_FLASH=y
CONFIG_FLASH_MAP=y
CONFIG_UART_CONSOLE=y
CONFIG_SPI=y
CONFIG_GPIO=y

6
boards/heltec/heltec_wifi_lora32_v4/Kconfig.defconfig Normal file
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if BOARD_HELTEC_WIFI_LORA32_V4
config BOARD
default "heltec_wifi_lora32_v4"
endif # BOARD_HELTEC_WIFI_LORA32_V4

3
boards/heltec/heltec_wifi_lora32_v4/Kconfig.heltec_wifi_lora32_v4 Normal file
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config BOARD_HELTEC_WIFI_LORA32_V4
select SOC_ESP32S3_PROCPU if BOARD_HELTEC_WIFI_LORA32_V4_PROCPU
select SOC_ESP32S3_APPCPU if BOARD_HELTEC_WIFI_LORA32_V4_APPCPU

3
boards/heltec/heltec_wifi_lora32_v4/board.cmake Normal file
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# Heltec WiFi LoRa 32 V4 — board.cmake
# Uses esptool for flashing over USB-C (direct ESP32-S3 USB)
include(${ZEPHYR_BASE}/boards/espressif/common/board.cmake)

10
boards/heltec/heltec_wifi_lora32_v4/board.yml Normal file
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board:
name: heltec_wifi_lora32_v4
full_name: "Heltec WiFi LoRa 32 V4"
vendor: heltec
url: https://heltec.org/project/wifi-lora-32-v4/
socs:
- name: esp32s3
variants:
- name: procpu
- name: appcpu

23
boards/heltec/heltec_wifi_lora32_v4/heltec_wifi_lora32_v4-pinctrl.dtsi Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec WiFi LoRa 32 V4 — pin control definitions
*/
#include <zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h>
#include <dt-bindings/pinctrl/esp32s3-pinctrl.h>
#include <zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h>
&pinctrl {
spim2_default: spim2_default {
group1 {
pinmux = <SPIM2_MISO_GPIO11>,
<SPIM2_SCLK_GPIO9>,
<SPIM2_CSEL_GPIO8>;
};
group2 {
pinmux = <SPIM2_MOSI_GPIO10>;
output-enable;
};
};
};

111
boards/heltec/heltec_wifi_lora32_v4/heltec_wifi_lora32_v4_procpu.dts Normal file
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/*
* SPDX-License-Identifier: Apache-2.0
*
* Heltec WiFi LoRa 32 V4 — Device Tree Source (PROCPU)
*
* Based on Heltec WiFi LoRa 32 V3 with the following differences:
* - No CP2102 USB-UART bridge; direct ESP32-S3 USB-C
* - Console routed to usb_serial instead of uart0
*/
/dts-v1/;
#include <espressif/esp32s3/esp32s3_fn8r2.dtsi>
#include "heltec_wifi_lora32_v4-pinctrl.dtsi"
#include <zephyr/dt-bindings/input/input-event-codes.h>
/ {
model = "Heltec WiFi LoRa 32 V4 PROCPU";
compatible = "heltec,wifi-lora-32-v4";
chosen {
zephyr,sram = &sram0;
zephyr,flash = &flash0;
zephyr,console = &usb_serial;
zephyr,shell-uart = &usb_serial;
zephyr,flash-controller = &flash;
};
aliases {
lora0 = &lora;
led0 = &led_white;
};
leds {
compatible = "gpio-leds";
led_white: led_0 {
/* V4 LED pin — verify from schematic */
gpios = <&gpio0 35 GPIO_ACTIVE_HIGH>;
label = "White LED";
};
};
buttons {
compatible = "gpio-keys";
boot_button: button_0 {
gpios = <&gpio0 0 (GPIO_PULL_UP | GPIO_ACTIVE_LOW)>;
label = "Boot Button";
zephyr,code = <INPUT_KEY_0>;
};
};
};
&usb_serial {
status = "okay";
};
&uart0 {
status = "disabled";
};
&spi2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0 8 GPIO_ACTIVE_LOW>;
lora: lora@0 {
compatible = "semtech,sx1262";
reg = <0>;
spi-max-frequency = <4000000>;
reset-gpios = <&gpio0 12 (GPIO_OPEN_DRAIN | GPIO_ACTIVE_LOW)>;
busy-gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
dio1-gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
dio2-tx-enable;
tcxo-power-startup-delay-ms = <5>;
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};
&flash0 {
status = "okay";
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
boot_partition: partition@0 {
label = "mcuboot";
reg = <0x00000000 0x00010000>;
};
slot0_partition: partition@10000 {
label = "image-0";
reg = <0x00010000 0x00300000>;
};
slot1_partition: partition@310000 {
label = "image-1";
reg = <0x00310000 0x00300000>;
};
storage_partition: partition@610000 {
label = "storage";
reg = <0x00610000 0x001f0000>;
};
};
};

7
boards/heltec/heltec_wifi_lora32_v4/heltec_wifi_lora32_v4_procpu_defconfig Normal file
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CONFIG_SOC_SERIES_ESP32S3=y
CONFIG_BOARD_HELTEC_WIFI_LORA32_V4=y
CONFIG_FLASH=y
CONFIG_FLASH_MAP=y
CONFIG_UART_CONSOLE=y
CONFIG_SPI=y
CONFIG_GPIO=y