maze
45d1364a71
- boards/seeed/xiao_wio_sx1262: add overlay, .conf, board.yml - app: support full set of SX12xx bandwidths; default BW set to 62 (62.5 kHz) - Update Kconfig and prj.conf - Update lora_modem.h/c for validation and mapping
56 lines
1.2 KiB
Plaintext
56 lines
1.2 KiB
Plaintext
/*
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* Seeed XIAO ESP32S3 + Wio-SX1262 — application DTS overlay
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* KISS interface: USB CDC-ACM
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* LoRa: SX1262 on SPI (wiring based on user-provided mappings)
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*
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* Pin mapping (logical Dx -> GPIO number assumed equal):
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* MOSI = D10 -> gpio0 10
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* MISO = D9 -> gpio0 9
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* SCK = D8 -> gpio0 8
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* NSS = D3 -> gpio0 3
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* DIO1 = D0 -> gpio0 0
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* BUSY = D1 -> gpio0 1
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* RST = D2 -> gpio0 2
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* RF-SW= D4 -> gpio0 4
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*/
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/ {
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chosen {
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loramodem,kiss-uart = &usb_serial;
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};
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aliases {
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lora0 = &lora;
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};
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};
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/* Enable SPI2 and attach SX1262 on CS=D3 */
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&spi2 {
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&spim2_default>;
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pinctrl-names = "default";
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cs-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
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lora: lora@0 {
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compatible = "semtech,sx1262";
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reg = <0>;
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spi-max-frequency = <4000000>;
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reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
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busy-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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dio1-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
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dio2-tx-enable;
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/* RF switch (optional): high = TX */
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tx-enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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/* If the module requires TCXO configuration, add dio3-tcxo-voltage */
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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