maze
45d1364a71
- boards/seeed/xiao_wio_sx1262: add overlay, .conf, board.yml - app: support full set of SX12xx bandwidths; default BW set to 62 (62.5 kHz) - Update Kconfig and prj.conf - Update lora_modem.h/c for validation and mapping
1196 lines
29 KiB
Plaintext
1196 lines
29 KiB
Plaintext
# 0 "/Users/wijnand/zephyrproject/zephyr/misc/empty_file.c"
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# 0 "<built-in>"
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# 0 "<command-line>"
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# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts" 1
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/dts-v1/;
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# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi" 1
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/dts-v1/;
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_wroom_n8r8.dtsi" 1 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 1 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/common/mem.h" 1 3 4
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# 7 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/common/freq.h" 1 3 4
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# 8 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/xtensa.dtsi" 1 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/dts/common/skeleton.dtsi" 1 3 4
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# 9 "/Users/wijnand/zephyrproject/zephyr/dts/common/skeleton.dtsi" 3 4
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/ {
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#address-cells = <1>;
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#size-cells = <1>;
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chosen {};
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aliases {};
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};
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# 8 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/xtensa.dtsi" 2 3 4
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/ {
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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};
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};
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# 9 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 1 3 4
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# 9 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 1 3 4
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# 19 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 1 3 4
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# 34 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 1 3 4
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# 18 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 1 3 4
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# 1465 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_listify.h" 1 3 4
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# 1466 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_loops.h" 2 3 4
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# 19 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
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# 203 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal_is_eq.h" 1 3 4
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# 204 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
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# 234 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_inc.h" 1 3 4
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# 235 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_dec.h" 1 3 4
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# 238 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal_util_x2.h" 1 3 4
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# 241 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_internal.h" 2 3 4
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# 35 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/sys/util_macro.h" 2 3 4
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# 20 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/dt-util.h" 2 3 4
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# 10 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/adc/adc.h" 2 3 4
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# 10 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/gpio/gpio.h" 1 3 4
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# 11 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/i2c/i2c.h" 1 3 4
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# 12 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/clock/esp32s3_clock.h" 1 3 4
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# 13 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/interrupt-controller/esp32s3-xtensa-intmux.h" 1 3 4
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# 14 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/esp32s3-pinctrl.h" 1 3 4
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# 15 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_common.dtsi" 2 3 4
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/ {
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aliases {
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die-temp0 = &coretemp;
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};
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chosen {
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zephyr,canbus = &twai;
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zephyr,entropy = &trng0;
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zephyr,flash-controller = &flash;
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zephyr,bt-hci = &esp32_bt_hci;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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cpu0: cpu@0 {
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device_type = "cpu";
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compatible = "espressif,xtensa-lx7";
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reg = <0>;
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cpu-power-states = <&light_sleep &deep_sleep>;
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clock-source = <1U>;
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clock-frequency = <(((240) * 1000) * 1000)>;
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xtal-freq = <(((40) * 1000) * 1000)>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "espressif,xtensa-lx7";
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reg = <1>;
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clock-source = <1U>;
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clock-frequency = <(((240) * 1000) * 1000)>;
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xtal-freq = <(((40) * 1000) * 1000)>;
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};
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power-states {
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light_sleep: light_sleep {
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compatible = "zephyr,power-state";
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power-state-name = "standby";
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min-residency-us = <1000>;
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exit-latency-us = <50>;
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};
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deep_sleep: deep_sleep {
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compatible = "zephyr,power-state";
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power-state-name = "soft-off";
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status = "disabled";
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};
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};
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};
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wifi: wifi {
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compatible = "espressif,esp32-wifi";
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status = "disabled";
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};
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esp32_bt_hci: esp32_bt_hci {
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compatible = "espressif,esp32-bt-hci";
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bt-hci-vs-ext;
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status = "disabled";
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};
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pinctrl: pin-controller {
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compatible = "espressif,esp32-pinctrl";
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status = "okay";
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};
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clock: clock {
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compatible = "espressif,esp32-clock";
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fast-clk-src = <1>;
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slow-clk-src = <0>;
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#clock-cells = <1>;
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status = "okay";
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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ranges;
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icache0: memory@42000000 {
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compatible = "zephyr,memory-region";
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reg = <0x42000000 (((32) * 1024) * 1024)>;
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zephyr,memory-region = "ICACHE0";
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};
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dcache0: memory@3c000000 {
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compatible = "zephyr,memory-region";
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reg = <0x3c000000 (((32) * 1024) * 1024)>;
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zephyr,memory-region = "DCACHE0";
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psram0: psram0 {
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compatible = "espressif,esp32-psram";
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size = <0x0>;
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};
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};
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sram0: memory@40370000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x40370000 ((32) * 1024)>;
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zephyr,memory-region = "SRAM0";
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};
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sram1: memory@3fc88000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x3fc88000 ((416) * 1024)>;
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zephyr,memory-region = "SRAM1";
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};
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sram2: memory@3fcf0000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x3fcf0000 ((64) * 1024)>;
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zephyr,memory-region = "SRAM2";
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};
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ipmmem0: memory@3fce5000 {
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compatible = "mmio-sram";
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reg = <0x3fce5000 0x400>;
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};
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shm0: memory@3fce5400 {
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compatible = "mmio-sram";
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reg = <0x3fce5400 0x4000>;
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};
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ipm0: ipm@3fce9400 {
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compatible = "espressif,esp32-ipm";
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reg = <0x3fce9400 0x8>;
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status = "disabled";
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shared-memory = <&ipmmem0>;
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shared-memory-size = <0x400>;
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interrupts = <79 0 0>,
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<80 0 0>;
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interrupt-parent = <&intc>;
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};
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mbox0: mbox@3fce9408 {
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compatible = "espressif,mbox-esp32";
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reg = <0x3fce9408 0x8>;
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status = "disabled";
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shared-memory = <&ipmmem0>;
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shared-memory-size = <0x400>;
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interrupts = <79 0 0>,
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<80 0 0>;
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interrupt-parent = <&intc>;
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#mbox-cells = <1>;
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};
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rtc_slow_ram: memory@50000000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x50000000 ((8) * 1024)>;
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zephyr,memory-region = "RTC_SLOW_RAM";
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};
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rtc_fast_ram: memory@600fe000 {
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compatible = "zephyr,memory-region", "mmio-sram";
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reg = <0x600fe000 ((8) * 1024)>;
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zephyr,memory-region = "RTC_FAST_RAM";
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};
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intc: interrupt-controller@600c2000 {
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#interrupt-cells = <3>;
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#address-cells = <0>;
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compatible = "espressif,esp32-intc";
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interrupt-controller;
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reg = <0x600c2000 0x1000>;
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status = "okay";
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};
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xt_wdt: xt_wdt@60021004 {
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compatible = "espressif,esp32-xt-wdt";
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reg = <0x60021004 0x4>;
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clocks = <&clock 12>;
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interrupts = <39 0 0>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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rtc_timer: rtc_timer@60008004 {
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reg = <0x60008004 0xc>;
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compatible = "espressif,esp32-rtc-timer";
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clocks = <&clock 12>;
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interrupts = <39 0 0>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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flash: flash-controller@60002000 {
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compatible = "espressif,esp32-flash-controller";
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reg = <0x60002000 0x1000>;
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#address-cells = <1>;
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#size-cells = <1>;
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flash0: flash@0 {
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compatible = "soc-nv-flash";
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erase-block-size = <4096>;
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write-block-size = <4>;
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};
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};
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uart0: uart@60000000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60000000 0x1000>;
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interrupts = <27 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 101>;
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status = "disabled";
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};
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uart1: uart@60010000 {
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compatible = "espressif,esp32-uart";
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reg = <0x60010000 0x1000>;
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interrupts = <28 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 0>;
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status = "disabled";
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};
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uart2: uart@6002e000 {
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compatible = "espressif,esp32-uart";
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reg = <0x6002e000 0x1000>;
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interrupts = <29 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 1>;
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status = "disabled";
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};
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gpio: gpio {
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compatible = "simple-bus";
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gpio-map-mask = <0xffffffe0 0xffffffc0>;
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gpio-map-pass-thru = <0x1f 0x3f>;
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gpio-map = <0x00 0x0 &gpio0 0x0 0x0
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0x20 0x0 &gpio1 0x0 0x0>;
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#gpio-cells = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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gpio0: gpio@60004000 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x60004000 0x800>;
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interrupts = <16 0 0>;
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interrupt-parent = <&intc>;
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ngpios = <32>;
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};
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gpio1: gpio@60004800 {
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compatible = "espressif,esp32-gpio";
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gpio-controller;
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#gpio-cells = <2>;
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reg = <0x60004800 0x800>;
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interrupts = <16 0 0>;
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interrupt-parent = <&intc>;
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ngpios = <22>;
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};
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};
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touch: touch@6000885c {
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compatible = "espressif,esp32-touch";
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reg = <0x6000885c 0x88 0x60008908 0x18>;
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interrupts = <39 0 0>;
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interrupt-parent = <&intc>;
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status = "disabled";
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};
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i2c0: i2c@60013000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x60013000 ((4) * 1024)>;
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interrupts = <42 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 103>;
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status = "disabled";
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};
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i2c1: i2c@60027000 {
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compatible = "espressif,esp32-i2c";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x60027000 ((4) * 1024)>;
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interrupts = <43 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 104>;
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status = "disabled";
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};
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i2s0: i2s@6000f000 {
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compatible = "espressif,esp32-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x6000f000 0x1000>;
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interrupts = <25 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 105>;
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dmas = <&dma 2>, <&dma 3>;
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dma-names = "rx", "tx";
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unit = <0>;
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status = "disabled";
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};
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i2s1: i2s@6002d000 {
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compatible = "espressif,esp32-i2s";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x6002d000 0x1000>;
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interrupts = <26 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 106>;
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dmas = <&dma 4>, <&dma 5>;
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dma-names = "rx", "tx";
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unit = <1>;
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status = "disabled";
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};
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spi2: spi@60024000 {
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compatible = "espressif,esp32-spi";
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reg = <0x60024000 ((4) * 1024)>;
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interrupts = <21 0 0>;
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interrupt-parent = <&intc>;
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clocks = <&clock 115>;
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dma-host = <0>;
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status = "disabled";
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};
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spi3: spi@60025000 {
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compatible = "espressif,esp32-spi";
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reg = <0x60025000 ((4) * 1024)>;
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interrupts = <22 0 0>;
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interrupt-parent = <&intc>;
|
|
clocks = <&clock 116>;
|
|
dma-host = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
coretemp: coretemp@60008800 {
|
|
compatible = "espressif,esp32-temp";
|
|
friendly-name = "coretemp";
|
|
reg = <0x60008800 0x4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc0: adc@60040000 {
|
|
compatible = "espressif,esp32-adc";
|
|
reg = <0x60040000 4>;
|
|
clocks = <&clock 128>;
|
|
unit = <1>;
|
|
channel-count = <10>;
|
|
#io-channel-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
adc1: adc@60040004 {
|
|
compatible = "espressif,esp32-adc";
|
|
reg = <0x60040004 4>;
|
|
clocks = <&clock 128>;
|
|
unit = <2>;
|
|
channel-count = <10>;
|
|
#io-channel-cells = <1>;
|
|
status = "disabled";
|
|
};
|
|
|
|
twai: can@6002b000 {
|
|
compatible = "espressif,esp32-twai";
|
|
reg = <0x6002b000 ((4) * 1024)>;
|
|
interrupts = <37 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 118>;
|
|
status = "disabled";
|
|
};
|
|
|
|
lcd_cam: lcd_cam@60041000 {
|
|
compatible = "espressif,esp32-lcd-cam";
|
|
reg = <0x60041000 ((4) * 1024)>;
|
|
clocks = <&clock 2>;
|
|
interrupts = <24 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
dmas = <&dma 6>, <&dma 7>;
|
|
dma-names = "rx", "tx";
|
|
|
|
lcd_cam_dvp: lcd_cam_dvp {
|
|
compatible = "espressif,esp32-lcd-cam-dvp";
|
|
status = "disabled";
|
|
};
|
|
|
|
lcd_cam_disp: lcd_cam_disp {
|
|
compatible = "espressif,esp32-lcd-cam-mipi-dbi";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
usb_serial: uart@60038000 {
|
|
compatible = "espressif,esp32-usb-serial";
|
|
reg = <0x60038000 ((4) * 1024)>;
|
|
status = "disabled";
|
|
interrupts = <96 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 102>;
|
|
};
|
|
|
|
usb_otg: usb_otg@60080000 {
|
|
compatible = "espressif,esp32-usb-otg", "snps,dwc2";
|
|
reg = <0x60080000 ((256) * 1024)>;
|
|
status = "disabled";
|
|
interrupts = <38 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 102>;
|
|
num-out-eps = <6>;
|
|
num-in-eps = <6>;
|
|
ghwcfg1 = <0x00000000>;
|
|
ghwcfg2 = <0x224dd930>;
|
|
ghwcfg4 = <0xd3f0a030>;
|
|
};
|
|
|
|
timer0: counter@6001f000 {
|
|
compatible = "espressif,esp32-timer";
|
|
reg = <0x6001f000 ((4) * 1024)>;
|
|
clocks = <&clock 3>;
|
|
group = <0>;
|
|
index = <0>;
|
|
interrupts = <50 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "espressif,esp32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timer1: counter@6001f024 {
|
|
compatible = "espressif,esp32-timer";
|
|
reg = <0x6001f024 ((4) * 1024)>;
|
|
clocks = <&clock 3>;
|
|
group = <0>;
|
|
index = <1>;
|
|
interrupts = <51 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "espressif,esp32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timer2: counter@60020000 {
|
|
compatible = "espressif,esp32-timer";
|
|
reg = <0x60020000 ((4) * 1024)>;
|
|
clocks = <&clock 4>;
|
|
group = <1>;
|
|
index = <0>;
|
|
interrupts = <53 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
status = "disabled";
|
|
|
|
counter {
|
|
compatible = "espressif,esp32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
timer3: counter@60020024 {
|
|
compatible = "espressif,esp32-timer";
|
|
reg = <0x60020024 ((4) * 1024)>;
|
|
clocks = <&clock 4>;
|
|
group = <1>;
|
|
index = <1>;
|
|
interrupts = <54 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
|
|
counter {
|
|
compatible = "espressif,esp32-counter";
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
wdt0: watchdog@6001f048 {
|
|
compatible = "espressif,esp32-watchdog";
|
|
reg = <0x6001f048 0x20>;
|
|
interrupts = <52 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
wdt1: watchdog@60020048 {
|
|
compatible = "espressif,esp32-watchdog";
|
|
reg = <0x60020048 0x20>;
|
|
interrupts = <55 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
trng0: trng@6003507c {
|
|
compatible = "espressif,esp32-trng";
|
|
reg = <0x6003507c 0x4>;
|
|
clocks = <&clock 6>;
|
|
status = "disabled";
|
|
};
|
|
|
|
ledc0: ledc@60019000 {
|
|
compatible = "espressif,esp32-ledc";
|
|
#pwm-cells = <3>;
|
|
reg = <0x60019000 ((4) * 1024)>;
|
|
clocks = <&clock 100>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mcpwm0: mcpwm@6001e000 {
|
|
compatible = "espressif,esp32-mcpwm";
|
|
reg = <0x6001e000 ((4) * 1024)>;
|
|
interrupts = <31 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 107>;
|
|
#pwm-cells = <3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
mcpwm1: mcpwm@6002c000 {
|
|
compatible = "espressif,esp32-mcpwm";
|
|
reg = <0x6002c000 ((4) * 1024)>;
|
|
interrupts = <32 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 108>;
|
|
#pwm-cells = <3>;
|
|
status = "disabled";
|
|
};
|
|
|
|
pcnt: pcnt@60017000 {
|
|
compatible = "espressif,esp32-pcnt";
|
|
reg = <0x60017000 ((4) * 1024)>;
|
|
interrupts = <41 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 113>;
|
|
status = "disabled";
|
|
};
|
|
|
|
dma: dma@6003f000 {
|
|
compatible = "espressif,esp32-gdma";
|
|
reg = <0x6003f000 ((4) * 1024)>;
|
|
#dma-cells = <1>;
|
|
interrupts = <66 0
|
|
(1<<8)>,
|
|
<71 0
|
|
(1<<8)>,
|
|
<67 0
|
|
(1<<8)>,
|
|
<72 0
|
|
(1<<8)>,
|
|
<68 0
|
|
(1<<8)>,
|
|
<73 0
|
|
(1<<8)>,
|
|
<69 0
|
|
(1<<8)>,
|
|
<74 0
|
|
(1<<8)>,
|
|
<70 0
|
|
(1<<8)>,
|
|
<75 0
|
|
(1<<8)>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 126>;
|
|
dma-channels = <10>;
|
|
dma-buf-addr-alignment = <4>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhc: sdhc@60028000 {
|
|
compatible = "espressif,esp32-sdhc";
|
|
reg = <0x60028000 0x1000>;
|
|
interrupts = <30 0 0>;
|
|
interrupt-parent = <&intc>;
|
|
clocks = <&clock 117>;
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
|
|
sdhc0: sdhc@0 {
|
|
compatible = "espressif,esp32-sdhc-slot";
|
|
reg = <0>;
|
|
status = "disabled";
|
|
};
|
|
|
|
sdhc1: sdhc@1 {
|
|
compatible = "espressif,esp32-sdhc-slot";
|
|
reg = <1>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
|
|
sha: sha@6003b000 {
|
|
compatible = "espressif,esp32-sha";
|
|
reg = <0x6003b000 0x100>;
|
|
clocks = <&clock 122>;
|
|
status = "okay";
|
|
};
|
|
|
|
aes: aes@6003a000 {
|
|
compatible = "espressif,esp32-aes";
|
|
reg = <0x6003a000 0x1000>;
|
|
clocks = <&clock 121>;
|
|
status = "okay";
|
|
};
|
|
};
|
|
};
|
|
# 8 "/Users/wijnand/zephyrproject/zephyr/dts/xtensa/espressif/esp32s3/esp32s3_wroom_n8r8.dtsi" 2 3 4
|
|
|
|
|
|
&flash0 {
|
|
reg = <0x0 (((8) * 1024) * 1024)>;
|
|
};
|
|
|
|
|
|
&psram0 {
|
|
size = <(((8) * 1024) * 1024)>;
|
|
};
|
|
# 10 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/esp-pinctrl-common.h" 1 3 4
|
|
# 8 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi" 2
|
|
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/include/zephyr/dt-bindings/pinctrl/esp32s3-gpio-sigmap.h" 1 3 4
|
|
# 10 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi" 2
|
|
|
|
&pinctrl {
|
|
uart0_default: uart0_default {
|
|
group1 {
|
|
pinmux = <(((43 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((12 & 0x1FFU) << 15U))>;
|
|
output-high;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((44 & 0x3FU) << 0U) | ((12 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
spim2_default: spim2_default {
|
|
group1 {
|
|
pinmux = <(((8 & 0x3FU) << 0U) | ((102 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((7 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((101 & 0x1FFU) << 15U))>;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((9 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((103 & 0x1FFU) << 15U))>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
i2c0_default: i2c0_default {
|
|
group1 {
|
|
pinmux = <(((5 & 0x3FU) << 0U) | ((90 & 0x1FFU) << 6U) | ((90 & 0x1FFU) << 15U))>,
|
|
<(((6 & 0x3FU) << 0U) | ((89 & 0x1FFU) << 6U) | ((89 & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
i2c1_default: i2c1_default {
|
|
group1 {
|
|
pinmux = <(((40 & 0x3FU) << 0U) | ((92 & 0x1FFU) << 6U) | ((92 & 0x1FFU) << 15U))>,
|
|
<(((39 & 0x3FU) << 0U) | ((91 & 0x1FFU) << 6U) | ((91 & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
lcd_cam_default: lcd_cam_default {
|
|
group1 {
|
|
pinmux = <(((10 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((149 & 0x1FFU) << 15U))>;
|
|
output-enable;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((38 & 0x3FU) << 0U) | ((152 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((47 & 0x3FU) << 0U) | ((150 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((13 & 0x3FU) << 0U) | ((149 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((15 & 0x3FU) << 0U) | ((133 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((17 & 0x3FU) << 0U) | ((134 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((18 & 0x3FU) << 0U) | ((135 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((16 & 0x3FU) << 0U) | ((136 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((14 & 0x3FU) << 0U) | ((137 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((12 & 0x3FU) << 0U) | ((138 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((11 & 0x3FU) << 0U) | ((139 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((48 & 0x3FU) << 0U) | ((140 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
input-enable;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
twai_default: twai_default {
|
|
group1 {
|
|
pinmux = <(((3 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((116 & 0x1FFU) << 15U))>,
|
|
<(((4 & 0x3FU) << 0U) | ((116 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
};
|
|
};
|
|
};
|
|
# 11 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/seeed_xiao_connector.dtsi" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/ {
|
|
xiao_d: connector {
|
|
compatible = "seeed,xiao-gpio";
|
|
#gpio-cells = <2>;
|
|
gpio-map-mask = <0xffffffff 0xffffffc0>;
|
|
gpio-map-pass-thru = <0 0x3f>;
|
|
gpio-map = <0 0 &gpio0 1 0>,
|
|
<1 0 &gpio0 2 0>,
|
|
<2 0 &gpio0 3 0>,
|
|
<3 0 &gpio0 4 0>,
|
|
<4 0 &gpio0 5 0>,
|
|
<5 0 &gpio0 6 0>,
|
|
<6 0 &gpio1 11 0>,
|
|
<7 0 &gpio1 12 0>,
|
|
<8 0 &gpio0 7 0>,
|
|
<9 0 &gpio0 8 0>,
|
|
<10 0 &gpio0 9 0>;
|
|
};
|
|
};
|
|
|
|
xiao_spi: &spi2 {};
|
|
|
|
xiao_i2c: &i2c0 {};
|
|
|
|
xiao_serial: &uart0 {};
|
|
|
|
xiao_adc: &adc0 {};
|
|
# 12 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu_common.dtsi" 2
|
|
|
|
/ {
|
|
chosen {
|
|
zephyr,sram = &sram1;
|
|
zephyr,console = &usb_serial;
|
|
zephyr,shell-uart = &usb_serial;
|
|
zephyr,flash = &flash0;
|
|
zephyr,code-partition = &slot0_partition;
|
|
zephyr,bt-hci = &esp32_bt_hci;
|
|
};
|
|
|
|
aliases {
|
|
i2c-0 = &i2c0;
|
|
watchdog0 = &wdt0;
|
|
led0 = &led0;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
led0: led_0 {
|
|
gpios = <&gpio0 21 (1 << 0)>;
|
|
label = "BUILTIN LED";
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb_serial {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart0 {
|
|
status = "okay";
|
|
current-speed = <115200>;
|
|
pinctrl-0 = <&uart0_default>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&i2c0 {
|
|
status = "okay";
|
|
clock-frequency = <100000>;
|
|
pinctrl-0 = <&i2c0_default>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&trng0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&spi2 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
pinctrl-0 = <&spim2_default>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&wdt0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&twai {
|
|
pinctrl-0 = <&twai_default>;
|
|
pinctrl-names = "default";
|
|
};
|
|
|
|
&timer0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&timer1 {
|
|
status = "okay";
|
|
};
|
|
|
|
&esp32_bt_hci {
|
|
status = "okay";
|
|
};
|
|
|
|
&wifi {
|
|
status = "okay";
|
|
};
|
|
# 10 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi" 1
|
|
# 11 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3-pinctrl.dtsi"
|
|
&pinctrl {
|
|
uart0_default: uart0_default {
|
|
group1 {
|
|
pinmux = <(((43 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((12 & 0x1FFU) << 15U))>;
|
|
output-high;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((44 & 0x3FU) << 0U) | ((12 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
};
|
|
};
|
|
|
|
spim2_default: spim2_default {
|
|
group1 {
|
|
pinmux = <(((8 & 0x3FU) << 0U) | ((102 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((7 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((101 & 0x1FFU) << 15U))>;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((9 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((103 & 0x1FFU) << 15U))>;
|
|
output-low;
|
|
};
|
|
};
|
|
|
|
i2c0_default: i2c0_default {
|
|
group1 {
|
|
pinmux = <(((5 & 0x3FU) << 0U) | ((90 & 0x1FFU) << 6U) | ((90 & 0x1FFU) << 15U))>,
|
|
<(((6 & 0x3FU) << 0U) | ((89 & 0x1FFU) << 6U) | ((89 & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
i2c1_default: i2c1_default {
|
|
group1 {
|
|
pinmux = <(((40 & 0x3FU) << 0U) | ((92 & 0x1FFU) << 6U) | ((92 & 0x1FFU) << 15U))>,
|
|
<(((39 & 0x3FU) << 0U) | ((91 & 0x1FFU) << 6U) | ((91 & 0x1FFU) << 15U))>;
|
|
bias-pull-up;
|
|
drive-open-drain;
|
|
output-high;
|
|
};
|
|
};
|
|
|
|
lcd_cam_default: lcd_cam_default {
|
|
group1 {
|
|
pinmux = <(((10 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((149 & 0x1FFU) << 15U))>;
|
|
output-enable;
|
|
};
|
|
|
|
group2 {
|
|
pinmux = <(((38 & 0x3FU) << 0U) | ((152 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((47 & 0x3FU) << 0U) | ((150 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((13 & 0x3FU) << 0U) | ((149 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((15 & 0x3FU) << 0U) | ((133 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((17 & 0x3FU) << 0U) | ((134 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((18 & 0x3FU) << 0U) | ((135 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((16 & 0x3FU) << 0U) | ((136 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((14 & 0x3FU) << 0U) | ((137 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((12 & 0x3FU) << 0U) | ((138 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((11 & 0x3FU) << 0U) | ((139 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>,
|
|
<(((48 & 0x3FU) << 0U) | ((140 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
input-enable;
|
|
bias-disable;
|
|
};
|
|
};
|
|
|
|
twai_default: twai_default {
|
|
group1 {
|
|
pinmux = <(((3 & 0x3FU) << 0U) | ((0x1FFU & 0x1FFU) << 6U) | ((116 & 0x1FFU) << 15U))>,
|
|
<(((4 & 0x3FU) << 0U) | ((116 & 0x1FFU) << 6U) | ((0x1FFU & 0x1FFU) << 15U))>;
|
|
};
|
|
};
|
|
};
|
|
# 11 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/seeed_xiao_connector.dtsi" 1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/ {
|
|
xiao_d: connector {
|
|
compatible = "seeed,xiao-gpio";
|
|
#gpio-cells = <2>;
|
|
gpio-map-mask = <0xffffffff 0xffffffc0>;
|
|
gpio-map-pass-thru = <0 0x3f>;
|
|
gpio-map = <0 0 &gpio0 1 0>,
|
|
<1 0 &gpio0 2 0>,
|
|
<2 0 &gpio0 3 0>,
|
|
<3 0 &gpio0 4 0>,
|
|
<4 0 &gpio0 5 0>,
|
|
<5 0 &gpio0 6 0>,
|
|
<6 0 &gpio1 11 0>,
|
|
<7 0 &gpio1 12 0>,
|
|
<8 0 &gpio0 7 0>,
|
|
<9 0 &gpio0 8 0>,
|
|
<10 0 &gpio0 9 0>;
|
|
};
|
|
};
|
|
|
|
xiao_spi: &spi2 {};
|
|
|
|
xiao_i2c: &i2c0 {};
|
|
|
|
xiao_serial: &uart0 {};
|
|
|
|
xiao_adc: &adc0 {};
|
|
# 12 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/dts/vendor/espressif/partitions_0x0_amp.dtsi" 1 3 4
|
|
|
|
|
|
|
|
|
|
|
|
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/dts/vendor/espressif/partitions_0x0_amp_4M.dtsi" 1 3 4
|
|
|
|
|
|
|
|
|
|
|
|
|
|
&flash0 {
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
boot_partition: partition@0 {
|
|
label = "mcuboot";
|
|
reg = <0x0 ((64) * 1024)>;
|
|
};
|
|
|
|
sys_partition: partition@10000 {
|
|
label = "sys";
|
|
reg = <0x10000 ((64) * 1024)>;
|
|
};
|
|
|
|
slot0_partition: partition@20000 {
|
|
label = "image-0";
|
|
reg = <0x20000 ((1344) * 1024)>;
|
|
};
|
|
|
|
slot1_partition: partition@170000 {
|
|
label = "image-1";
|
|
reg = <0x170000 ((1344) * 1024)>;
|
|
};
|
|
|
|
slot0_appcpu_partition: partition@2c0000 {
|
|
label = "image-0-appcpu";
|
|
reg = <0x2c0000 ((448) * 1024)>;
|
|
};
|
|
|
|
slot1_appcpu_partition: partition@330000 {
|
|
label = "image-1-appcpu";
|
|
reg = <0x330000 ((448) * 1024)>;
|
|
};
|
|
|
|
slot0_lpcore_partition: partition@3a0000 {
|
|
label = "image-0-lpcore";
|
|
reg = <0x3a0000 ((32) * 1024)>;
|
|
};
|
|
|
|
slot1_lpcore_partition: partition@3a8000 {
|
|
label = "image-1-lpcore";
|
|
reg = <0x3a8000 ((32) * 1024)>;
|
|
};
|
|
|
|
storage_partition: partition@3b0000 {
|
|
label = "storage";
|
|
reg = <0x3b0000 ((192) * 1024)>;
|
|
};
|
|
|
|
scratch_partition: partition@3e0000 {
|
|
label = "image-scratch";
|
|
reg = <0x3e0000 ((124) * 1024)>;
|
|
};
|
|
|
|
coredump_partition: partition@3ff000 {
|
|
label = "coredump";
|
|
reg = <0x3ff000 ((4) * 1024)>;
|
|
};
|
|
};
|
|
};
|
|
# 8 "/Users/wijnand/zephyrproject/zephyr/dts/vendor/espressif/partitions_0x0_amp.dtsi" 2 3 4
|
|
# 13 "/Users/wijnand/zephyrproject/zephyr/boards/seeed/xiao_esp32s3/xiao_esp32s3_procpu.dts" 2
|
|
|
|
/ {
|
|
model = "Seeed Xiao ESP32S3 PROCPU";
|
|
compatible = "seeed,xiao-esp32s3";
|
|
};
|
|
# 0 "<command-line>" 2
|
|
# 1 "/Volumes/External/Work/radio/loramodem/boards/seeed/xiao_wio_sx1262/xiao_wio_sx1262.overlay" 1
|
|
# 17 "/Volumes/External/Work/radio/loramodem/boards/seeed/xiao_wio_sx1262/xiao_wio_sx1262.overlay"
|
|
/ {
|
|
chosen {
|
|
loramodem,kiss-uart = &usb_serial;
|
|
};
|
|
aliases {
|
|
lora0 = &lora;
|
|
};
|
|
};
|
|
|
|
|
|
&spi2 {
|
|
status = "okay";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
pinctrl-0 = <&spim2_default>;
|
|
pinctrl-names = "default";
|
|
cs-gpios = <&gpio0 3 (1 << 0)>;
|
|
|
|
lora: lora@0 {
|
|
compatible = "semtech,sx1262";
|
|
reg = <0>;
|
|
spi-max-frequency = <4000000>;
|
|
reset-gpios = <&gpio0 2 (1 << 0)>;
|
|
busy-gpios = <&gpio0 1 (0 << 0)>;
|
|
dio1-gpios = <&gpio0 0 (0 << 0)>;
|
|
dio2-tx-enable;
|
|
|
|
tx-enable-gpios = <&gpio0 4 (0 << 0)>;
|
|
|
|
};
|
|
};
|
|
|
|
&gpio0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio1 {
|
|
status = "okay";
|
|
};
|
|
# 0 "<command-line>" 2
|
|
# 1 "/Users/wijnand/zephyrproject/zephyr/misc/empty_file.c"
|