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Bringing Massdrop keyboard hardware configuration to keyboard level (#4593)

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MCU Pins for debugging, LED, boot tracing, and shift registers are now configurable at keyboard level.
Macros led_* replaced by DBG_LED_*
Macros m15_* replaced by DBG_1_*
Macros m27_* replaced by DBG_2_*
Macros m28_* replaced by DBG_3_*
For CTRL and ALT keyboards, debug boot tracing pin default now set to pad M27 instead of M28 since although M28 is not being used, it is technically a signal for USB port detection.
m15_print(...) renamed to dbg_print(...) to get away from hard coded port names.
dbg_print function now follows similar pattern to debug led output.
This commit is contained in:
patrickmt
2018-12-10 14:28:06 -05:00
committed by Drashna Jaelre
parent e99615b2ac
commit 4a5e68f4f2
12 changed files with 374 additions and 185 deletions
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39
tmk_core/protocol/arm_atsam/spi.h
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@ -18,21 +18,28 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#ifndef _SPI_H_
#define _SPI_H_
//TODO: PS: Should bring ports to keyboard configuration
/* Macros for Shift Register control */
#define SR_EXP_RCLK_LO PORT->Group[SR_EXP_RCLK_PORT].OUTCLR.reg = (1 << SR_EXP_RCLK_PIN)
#define SR_EXP_RCLK_HI PORT->Group[SR_EXP_RCLK_PORT].OUTSET.reg = (1 << SR_EXP_RCLK_PIN)
#define SR_EXP_OE_N_ENA PORT->Group[SR_EXP_OE_N_PORT].OUTCLR.reg = (1 << SR_EXP_OE_N_PIN)
#define SR_EXP_OE_N_DIS PORT->Group[SR_EXP_OE_N_PORT].OUTSET.reg = (1 << SR_EXP_OE_N_PIN)
#define SCSPI SERCOM2
/* Determine bits to set for mux selection */
#if SR_EXP_DATAOUT_PIN % 2 == 0
#define SR_EXP_DATAOUT_MUX_SEL PMUXE
#else
#define SR_EXP_DATAOUT_MUX_SEL PMUXO
#endif
#define P14_DIR 0x00004000 /* PIN14 DIR Bit */
#define P14_OUT 0x00004000 /* PIN14 OUT Bit */
#define P15_DIR 0x00008000 /* PIN15 DIR Bit */
#define P15_OUT 0x00008000 /* PIN15 OUT Bit */
#define SC2_RCLCK_LO REG_PORT_OUTCLR1 = P14_OUT /* PB14 Low, SC2_RCLCK Low */
#define SC2_RCLCK_HI REG_PORT_OUTSET1 = P14_OUT /* PB14 High, SC2_RCLCK High */
#define SC2_OE_ENA REG_PORT_OUTCLR1 = P15_OUT /* PB15 Low, SC2_OE_N Low (Shift register enabled) */
#define SC2_OE_DIS REG_PORT_OUTSET1 = P15_OUT /* PB15 High, SC2_OE_N High (Shift register disabled) */
#define SC2_DIRSET REG_PORT_DIRSET1 = P14_DIR | P15_DIR; /* PB14 PB15 OUT */
/* Determine bits to set for mux selection */
#if SR_EXP_SCLK_PIN % 2 == 0
#define SR_EXP_SCLK_MUX_SEL PMUXE
#else
#define SR_EXP_SCLK_MUX_SEL PMUXO
#endif
/* Data structure to define Shift Register output expander hardware */
/* This structure gets shifted into registers LSB first */
typedef union {
struct {
uint16_t RSVD4:1; /*!< bit: 0 */
@ -53,11 +60,11 @@ typedef union {
uint16_t HUB_CONNECT:1; /*!< bit: 15 SIGNAL VBUS CONNECT TO USB HUB WHEN 1 */
} bit; /*!< Structure used for bit access */
uint16_t reg; /*!< Type used for register access */
} Srdata_t;
} sr_exp_t;
extern Srdata_t srdata;
extern sr_exp_t sr_exp_data;
void SPI_WriteSRData(void);
void SPI_Init(void);
void SR_EXP_WriteData(void);
void SR_EXP_Init(void);
#endif //_SPI_H_