format code according to conventions [skip ci]
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@ -32,35 +32,35 @@
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#include "uart.h"
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#if defined(__AVR_ATmega168__) || defined(__AVR_ATmega168P__) || defined(__AVR_ATmega328P__)
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# define UDRn UDR0
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# define UBRRn UBRR0
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# define UCSRnA UCSR0A
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# define UCSRnB UCSR0B
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# define UCSRnC UCSR0C
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# define U2Xn U2X0
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# define RXENn RXEN0
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# define TXENn TXEN0
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# define RXCIEn RXCIE0
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# define UCSZn1 UCSZ01
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# define UCSZn0 UCSZ00
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# define UDRIEn UDRIE0
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# define UDRE_vect USART_UDRE_vect
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# define RX_vect USART_RX_vect
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# define UDRn UDR0
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# define UBRRn UBRR0
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# define UCSRnA UCSR0A
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# define UCSRnB UCSR0B
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# define UCSRnC UCSR0C
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# define U2Xn U2X0
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# define RXENn RXEN0
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# define TXENn TXEN0
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# define RXCIEn RXCIE0
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# define UCSZn1 UCSZ01
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# define UCSZn0 UCSZ00
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# define UDRIEn UDRIE0
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# define UDRE_vect USART_UDRE_vect
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# define RX_vect USART_RX_vect
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#elif defined(__AVR_ATmega32U4__) || defined(__AVR_ATmega32U2__) || defined(__AVR_AT90USB1286__) || defined(__AVR_AT90USB1287__)
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# define UDRn UDR1
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# define UBRRn UBRR1
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# define UCSRnA UCSR1A
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# define UCSRnB UCSR1B
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# define UCSRnC UCSR1C
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# define U2Xn U2X1
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# define RXENn RXEN1
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# define TXENn TXEN1
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# define RXCIEn RXCIE1
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# define UCSZn1 UCSZ11
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# define UCSZn0 UCSZ10
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# define UDRIEn UDRIE1
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# define UDRE_vect USART1_UDRE_vect
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# define RX_vect USART1_RX_vect
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# define UDRn UDR1
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# define UBRRn UBRR1
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# define UCSRnA UCSR1A
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# define UCSRnB UCSR1B
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# define UCSRnC UCSR1C
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# define U2Xn U2X1
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# define RXENn RXEN1
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# define TXENn TXEN1
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# define RXCIEn RXCIE1
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# define UCSZn1 UCSZ11
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# define UCSZn0 UCSZ10
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# define UDRIEn UDRIE1
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# define UDRE_vect USART1_UDRE_vect
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# define RX_vect USART1_RX_vect
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#endif
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// These buffers may be any size from 2 to 256 bytes.
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@ -92,14 +92,14 @@ void uart_putchar(uint8_t c) {
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i = tx_buffer_head + 1;
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if (i >= TX_BUFFER_SIZE) i = 0;
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// return immediately to avoid deadlock when interrupt is disabled(called from ISR)
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if (tx_buffer_tail == i && (SREG & (1<<SREG_I)) == 0) return;
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// return immediately to avoid deadlock when interrupt is disabled(called from ISR)
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if (tx_buffer_tail == i && (SREG & (1 << SREG_I)) == 0) return;
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while (tx_buffer_tail == i)
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; // wait until space in buffer
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// cli();
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tx_buffer[i] = c;
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tx_buffer_head = i;
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UCSRB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn) | (1 << UDRIEn);
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UCSRB = (1 << RXENn) | (1 << TXENn) | (1 << RXCIEn) | (1 << UDRIEn);
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// sei();
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}
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