214 lines
6.2 KiB
C
214 lines
6.2 KiB
C
#include <ch.h>
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#include <hal.h>
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#include "led.h"
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#include "sleep_led.h"
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/* All right, we go the "software" way: timer, toggle LED in interrupt.
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* Based on hasu's code for AVRs.
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* Use LP timer on Kinetises, TIM14 on STM32F0.
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*/
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#if defined(KL2x) || defined(K20x)
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/* Use Low Power Timer (LPTMR) */
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# define TIMER_INTERRUPT_VECTOR KINETIS_LPTMR0_IRQ_VECTOR
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# define RESET_COUNTER LPTMR0->CSR |= LPTMRx_CSR_TCF
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#elif defined(STM32F0XX)
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/* Use TIM14 manually */
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# define TIMER_INTERRUPT_VECTOR STM32_TIM14_HANDLER
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# define RESET_COUNTER STM32_TIM14->SR &= ~STM32_TIM_SR_UIF
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#endif
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#if defined(KL2x) || defined(K20x) || defined(STM32F0XX) /* common parts for timers/interrupts */
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/* Breathing Sleep LED brighness(PWM On period) table
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* (64[steps] * 4[duration]) / 64[PWM periods/s] = 4 second breath cycle
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*
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* http://www.wolframalpha.com/input/?i=%28sin%28+x%2F64*pi%29**8+*+255%2C+x%3D0+to+63
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* (0..63).each {|x| p ((sin(x/64.0*PI)**8)*255).to_i }
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*/
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static const uint8_t breathing_table[64] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 4, 6, 10, 15, 23, 32, 44, 58, 74, 93, 113, 135, 157, 179, 199, 218, 233, 245, 252, 255, 252, 245, 233, 218, 199, 179, 157, 135, 113, 93, 74, 58, 44, 32, 23, 15, 10, 6, 4, 2, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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/* interrupt handler */
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OSAL_IRQ_HANDLER(TIMER_INTERRUPT_VECTOR) {
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OSAL_IRQ_PROLOGUE();
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/* Software PWM
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* timer:1111 1111 1111 1111
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* \_____/\/ \_______/____ count(0-255)
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* \ \______________ duration of step(4)
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* \__________________ index of step table(0-63)
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*/
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// this works for cca 65536 irqs/sec
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static union {
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uint16_t row;
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struct {
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uint8_t count : 8;
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uint8_t duration : 2;
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uint8_t index : 6;
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} pwm;
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} timer = {.row = 0};
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timer.row++;
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// LED on
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if (timer.pwm.count == 0) {
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led_set(1 << USB_LED_CAPS_LOCK);
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}
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// LED off
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if (timer.pwm.count == breathing_table[timer.pwm.index]) {
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led_set(0);
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}
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/* Reset the counter */
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RESET_COUNTER;
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OSAL_IRQ_EPILOGUE();
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}
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#endif /* common parts for known platforms */
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#if defined(KL2x) || defined(K20x) /* platform selection: familiar Kinetis chips */
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/* LPTMR clock options */
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# define LPTMR_CLOCK_MCGIRCLK 0 /* 4MHz clock */
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# define LPTMR_CLOCK_LPO 1 /* 1kHz clock */
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# define LPTMR_CLOCK_ERCLK32K 2 /* external 32kHz crystal */
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# define LPTMR_CLOCK_OSCERCLK 3 /* output from OSC */
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/* Work around inconsistencies in Freescale naming */
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# if !defined(SIM_SCGC5_LPTMR)
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# define SIM_SCGC5_LPTMR SIM_SCGC5_LPTIMER
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# endif
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/* Initialise the timer */
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void sleep_led_init(void) {
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/* Make sure the clock to the LPTMR is enabled */
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SIM->SCGC5 |= SIM_SCGC5_LPTMR;
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/* Reset LPTMR settings */
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LPTMR0->CSR = 0;
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/* Set the compare value */
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LPTMR0->CMR = 0; // trigger on counter value (i.e. every time)
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/* Set up clock source and prescaler */
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/* Software PWM
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* ______ ______ __
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* | ON |___OFF___| ON |___OFF___| ....
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* |<-------------->|<-------------->|<- ....
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* PWM period PWM period
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*
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* R interrupts/period[resolution]
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* F periods/second[frequency]
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* R * F interrupts/second
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*/
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/* === OPTION 1 === */
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# if 0
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// 1kHz LPO
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// No prescaler => 1024 irqs/sec
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// Note: this is too slow for a smooth breathe
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LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_LPO)|LPTMRx_PSR_PBYP;
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# endif /* OPTION 1 */
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/* === OPTION 2 === */
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# if 1
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// nMHz IRC (n=4 on KL25Z, KL26Z and K20x; n=2 or 8 on KL27Z)
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MCG->C2 |= MCG_C2_IRCS; // fast (4MHz) internal ref clock
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# if defined(KL27) // divide the 8MHz IRC by 2, to have the same MCGIRCLK speed as others
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MCG->MC |= MCG_MC_LIRC_DIV2_DIV2;
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# endif /* KL27 */
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MCG->C1 |= MCG_C1_IRCLKEN; // enable internal ref clock
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// to work in stop mode, also MCG_C1_IREFSTEN
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// Divide 4MHz by 2^N (N=6) => 62500 irqs/sec =>
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// => approx F=61, R=256, duration = 4
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LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_MCGIRCLK) | LPTMRx_PSR_PRESCALE(6);
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# endif /* OPTION 2 */
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/* === OPTION 3 === */
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# if 0
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// OSC output (external crystal), usually 8MHz or 16MHz
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OSC0->CR |= OSC_CR_ERCLKEN; // enable ext ref clock
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// to work in stop mode, also OSC_CR_EREFSTEN
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// Divide by 2^N
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LPTMR0->PSR = LPTMRx_PSR_PCS(LPTMR_CLOCK_OSCERCLK)|LPTMRx_PSR_PRESCALE(7);
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# endif /* OPTION 3 */
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/* === END OPTIONS === */
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/* Interrupt on TCF set (compare flag) */
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nvicEnableVector(LPTMR0_IRQn, 2); // vector, priority
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LPTMR0->CSR |= LPTMRx_CSR_TIE;
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}
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void sleep_led_enable(void) {
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/* Enable the timer */
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LPTMR0->CSR |= LPTMRx_CSR_TEN;
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}
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void sleep_led_disable(void) {
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/* Disable the timer */
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LPTMR0->CSR &= ~LPTMRx_CSR_TEN;
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}
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void sleep_led_toggle(void) {
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/* Toggle the timer */
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LPTMR0->CSR ^= LPTMRx_CSR_TEN;
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}
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#elif defined(STM32F0XX) /* platform selection: STM32F0XX */
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/* Initialise the timer */
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void sleep_led_init(void) {
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/* enable clock */
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rccEnableTIM14(FALSE); /* low power enable = FALSE */
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rccResetTIM14();
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/* prescale */
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/* Assuming 48MHz internal clock */
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/* getting cca 65484 irqs/sec */
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STM32_TIM14->PSC = 733;
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/* auto-reload */
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/* 0 => interrupt every time */
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STM32_TIM14->ARR = 3;
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/* enable counter update event interrupt */
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STM32_TIM14->DIER |= STM32_TIM_DIER_UIE;
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/* register interrupt vector */
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nvicEnableVector(STM32_TIM14_NUMBER, 2); /* vector, priority */
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}
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void sleep_led_enable(void) {
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/* Enable the timer */
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STM32_TIM14->CR1 = STM32_TIM_CR1_CEN | STM32_TIM_CR1_URS;
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/* URS => update event only on overflow; setting UG bit disabled */
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}
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void sleep_led_disable(void) {
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/* Disable the timer */
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STM32_TIM14->CR1 = 0;
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}
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void sleep_led_toggle(void) {
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/* Toggle the timer */
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STM32_TIM14->CR1 ^= STM32_TIM_CR1_CEN;
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}
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#else /* platform selection: not on familiar chips */
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void sleep_led_init(void) {}
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void sleep_led_enable(void) { led_set(1 << USB_LED_CAPS_LOCK); }
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void sleep_led_disable(void) { led_set(0); }
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void sleep_led_toggle(void) {
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// not implemented
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}
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#endif /* platform selection */ |