1646c0f26c
* Add Per Key functionality for AutoShift (#11536) * LED Matrix: Reactive effect buffers & advanced indicators (#12588) * [Keyboard] kint36: switch to sym_eager_pk debouncing (#12626) * [Keyboard] kint2pp: reduce input latency by ≈10ms (#12625) * LED Matrix: Split (#12633) * [CI] Format code according to conventions (#12650) * feat: infinite timeout for leader key (#6580) * feat: implement leader_no_timeout logic * docs(leader_key): infinite leader timeout docs * Format code according to conventions (#12680) * Update ADC driver for STM32F1xx, STM32F3xx, STM32F4xx (#12403) * Fix default ADC_RESOLUTION for ADCv3 (and ADCv4) Recent ChibiOS update removed ADC_CFGR1_RES_10BIT from the ADCv3 headers (that macro should not have been there, because ADCv3 has CFGR instead of CFGR1). Fix the default value for ADC_RESOLUTION to use ADC_CFGR_RES_10BITS if it is defined (that name is used for ADCv3 and ADCv4). * Update ADC docs to match the actually used resolution ADC driver for ChibiOS actually uses the 10-bit resolution by default (probably to match AVR); fix the documentation accordingly. Also add both ADC_CFGR_RES_10BITS and ADC_CFGR1_RES_10BIT constants (these names differ according to the ADC implementation in the particular MCU). * Fix pinToMux() for B12 and B13 on STM32F3xx Testing on STM32F303CCT6 revealed that the ADC mux values for B12 and B13 pins were wrong. * Add support for all possible analog pins on STM32F1xx Added ADC mux values for pins A0...A7, B0, B1, C0...C5 on STM32F1xx (they are the same at least for STM32F103x8 and larger F103 devices, and also F102, F105, F107 families). Actually tested on STM32F103C8T6 (therefore pins C0...C5 were not tested). Pins F6...F10, which are present on STM32F103x[C-G] in 144-pin packages, cannot be supported at the moment, because those pins are connected only to ADC3, but the ChibiOS ADC driver for STM32F1xx supports only ADC1. * Add support for all possible analog pins on STM32F4xx Added ADC mux values for pins A0...A7, B0, B1, C0...C5 and optionally F3...F10 (if STM32_ADC_USE_ADC3 is enabled). These mux values are apparently the same for all F4xx devices, except some smaller devices may not have ADC3. Actually tested on STM32F401CCU6, STM32F401CEU6, STM32F411CEU6 (using various WeAct “Blackpill” boards); only pins A0...A7, B0, B1 were tested. Pins F3...F10 are inside `#if STM32_ADC_USE_ADC3` because some devices which don't have ADC3 also don't have the GPIOF port, therefore the code which refers to Fx pins does not compile. * Fix STM32F3xx ADC mux table in documentation The ADC driver documentation had some errors in the mux table for STM32F3xx. Fix this table to match the datasheet and the actual code (mux settings for B12 and B13 were also tested on a real STM32F303CCT6 chip). * Add STM32F1xx ADC pins to the documentation * Add STM32F4xx ADC pins to the documentation * Add initial support for tinyuf2 bootloader (when hosted on F411 blackpill) (#12600) * Add support for jumping to tinyuf2 bootloader. Adds blackpill UF2 example. * Update flashing.md * Update chconf.h * Update config.h * Update halconf.h * Update mcuconf.h * eeprom driver: Refactor where eeprom driver initialisation (and EEPROM emulation initialisation) occurs to make it non-target-specific. (#12671) * Add support for MCU = STM32F446 (#12619) * Add support for MCU = STM32F446 * Update platforms/chibios/GENERIC_STM32_F446XE/configs/config.h * Restore mcuconf.h to the one used by RT-STM32F446RE-NUCLEO64 * stm32f446: update mcuconf.h and board.h for 16MHz operation, with USB enabled, and other peripherals disabled. * Format code according to conventions (#12682) * Format code according to conventions (#12687) * Add STM32L433 and L443 support (#12063) * initial L433 commit * change to XC * fix L433 * disable all peripherals * update system and peripheral clocks * 433 change * use its own board files * revert its own board files * l433 specific change * fix stm32l432xx define * remove duplicate #define * fix bootloader jump * move to L443xx and add i2c2, spi2, usart3 to mcuconf.h * move to L443 * move to L443 * fix sdmmc in mcuconf.h * include STM32L443 * add L443 * Include L443 in compatible microcontrollers * Include L443 in compatible microcontrollers * Update config bootloader jump description * Update ChibiOS define reasoning * Update quantum/mcu_selection.mk * fix git conflict * Updated Function96 with V2 files and removed chconf.h and halconf.h (#12613) * Fix bad PR merge for #6580. (#12721) * Change RGB/LED Matrix to use a simple define for USB suspend (#12697) * [CI] Format code according to conventions (#12731) * Fixing transport's led/rgb matrix suspend state logic (#12770) * [CI] Format code according to conventions (#12772) * Fix comment parsing (#12750) * Added OLED fade out support (#12086) * fix some references to bin/qmk that slipped in (#12832) * Resolve a number of warnings in `qmk generate-api` (#12833) * New command: qmk console (#12828) * stash poc * stash * tidy up implementation * Tidy up slightly for review * Tidy up slightly for review * Bodge environment to make tests pass * Refactor away from asyncio due to windows issues * Filter devices * align vid/pid printing * Add hidapi to the installers * start preparing for multiple hid_listeners * udev rules for hid_listen * refactor to move closer to end state * very basic implementation of the threaded model * refactor how vid/pid/index are supplied and parsed * windows improvements * read the report directly when usage page isn't available * add per-device colors, the choice to show names or numbers, and refactor * add timestamps * Add support for showing bootloaders * tweak the color for bootloaders * Align bootloader disconnect with connect color * add support for showing all bootloaders * fix the pyusb check * tweaks * fix exception * hide a stack trace behind -v * add --no-bootloaders option * add documentation for qmk console * Apply suggestions from code review * pyformat * clean up and flesh out KNOWN_BOOTLOADERS * Remove pointless SERIAL_LINK_ENABLE rules (#12846) * Make Swap Hands use PROGMEM (#12284) This converts the array that the Swap Hands feature uses to use PROGMEM, and to read from that array, as such. Since this array never changes at runtime, there is no reason to keep it in memory. Especially for AVR boards, as memory is a precious resource. * Fix another bin/qmk reference (#12856) * [Keymap] Turn OLED off on suspend in soundmonster keymap (#10419) * Fixup build errors on `develop` branch. (#12723) * LED Matrix: Effects! (#12651) * Fix syntax error when compiling for ARM (#12866) * Remove KEYMAP and LAYOUT_kc (#12160) * alias KEYMAP to LAYOUT * remove KEYMAP and LAYOUT_kc * Add setup, clone, and env to the list of commands we allow even with broken modules (#12868) * Rename `point_t` -> `led_point_t` (#12864) * [Keyboard] updated a vendor name / fixed minor keymap issues (#12881) * Add missing LED Matrix suspend code to suspend.c (#12878) * LED Matrix: Documentation (#12685) * Deprecate `send_unicode_hex_string()` (#12602) * Fix spelling mistake regarding LED Matrix in split_common. (#12888) * [Keymap] Fix QWERTY/DVORAK status output for kzar keymap (#12895) * Use milc.subcommand.config instead of qmk.cli.config (#12915) * Use milc.subcommand.config instead * pyformat * remove the config test * Add function to allow repeated blinking of one layer (#12237) * Implement function rgblight_blink_layer_repeat to allow repeated blinking of one layer at a time * Update doc * Rework rgblight blinking according to requested change * optimize storage * Fixup housekeeping from being invoked twice per loop. (#12933) * matrix: wait for row signal to go HIGH for every row (#12945) I noticed this discrepancy (last row of the matrix treated differently than the others) when optimizing the input latency of my keyboard controller, see also https://michael.stapelberg.ch/posts/2021-05-08-keyboard-input-latency-qmk-kinesis/ Before this commit, when tuning the delays I noticed ghost key presses when pressing the F2 key, which is on the last row of the keyboard matrix: the dead_grave key, which is on the first row of the keyboard matrix, would be incorrectly detected as pressed. After this commit, all keyboard matrix rows are interpreted correctly. I suspect that my setup is more susceptible to this nuance than others because I use GPIO_INPUT_PIN_DELAY=0 and hence don’t have another delay that might mask the problem. * ensure we do not conflict with existing keymap aliases (#12976) * Add support for up to 4 IS31FL3733 drivers (#12342) * Convert Encoder callbacks to be boolean functions (#12805) * [Keyboard] Fix Terrazzo build failure (#12977) * Do not hard set config in CPTC files (#11864) * [Keyboard] Corne - Remove legacy revision support (#12226) * [Keymap] Update to Drashna keymap and user code (based on develop) (#12936) * Add Full-duplex serial driver for ARM boards (#9842) * Document LED_MATRIX_FRAMEBUFFER_EFFECTS (#12987) * Backlight: add defines for default level and breathing state (#12560) * Add dire message about LUFA mass storage bootloader (#13014) * [Keyboard] Remove redundant legacy and common headers for crkbd (#13023) Was causing compiler errors on some systems. * Fix keyboards/keymaps for boolean encoder callback changes (#12985) * `backlight.c`: include `eeprom.h` (#13024) * Add changelog for 2021-05-29 Breaking Changes merge (#12939) * Add ChangeLog for 2021-05-29 Breaking Changes Merge: initial version * Add recent develop changes * Sort recent develop changes * Remove sections for ChibiOS changes per tzarc No ChibiOS changes this round. * Add and sort recent develop changes * add notes about keyboard moves/deletions * import changelog for PR 12172 Documents the change to BOOTMAGIC_ENABLE. * update section headings * re-sort changelog * add additional note regarding Bootmagic changes * remove changelog timestamp * update dates in main Breaking Changes docs * fix broken section anchors in previous changelogs * add link to backlight/eeprom patch to changelog * highlight some more changes * link PRs from section headers * Restore standard readme * run: qmk cformat --core-only
322 lines
13 KiB
C
322 lines
13 KiB
C
/* Copyright 2019 Drew Mills
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*
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* This program is free software: you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation, either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "quantum.h"
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#include "analog.h"
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#include <ch.h>
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#include <hal.h>
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#if !HAL_USE_ADC
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# error "You need to set HAL_USE_ADC to TRUE in your halconf.h to use the ADC."
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#endif
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#if !STM32_ADC_USE_ADC1 && !STM32_ADC_USE_ADC2 && !STM32_ADC_USE_ADC3 && !STM32_ADC_USE_ADC4
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# error "You need to set one of the 'STM32_ADC_USE_ADCx' settings to TRUE in your mcuconf.h to use the ADC."
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#endif
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#if STM32_ADC_DUAL_MODE
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# error "STM32 ADC Dual Mode is not supported at this time."
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#endif
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#if STM32_ADCV3_OVERSAMPLING
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# error "STM32 ADCV3 Oversampling is not supported at this time."
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#endif
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// Otherwise assume V3
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#if defined(STM32F0XX) || defined(STM32L0XX)
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# define USE_ADCV1
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#elif defined(STM32F1XX) || defined(STM32F2XX) || defined(STM32F4XX)
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# define USE_ADCV2
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#endif
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// BODGE to make v2 look like v1,3 and 4
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#ifdef USE_ADCV2
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_3)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_3
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_15
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_28
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_56
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_84
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_112
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_144
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_480
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# endif
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# if !defined(ADC_SMPR_SMP_1P5) && defined(ADC_SAMPLE_1P5)
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# define ADC_SMPR_SMP_1P5 ADC_SAMPLE_1P5
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# define ADC_SMPR_SMP_7P5 ADC_SAMPLE_7P5
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# define ADC_SMPR_SMP_13P5 ADC_SAMPLE_13P5
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# define ADC_SMPR_SMP_28P5 ADC_SAMPLE_28P5
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# define ADC_SMPR_SMP_41P5 ADC_SAMPLE_41P5
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# define ADC_SMPR_SMP_55P5 ADC_SAMPLE_55P5
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# define ADC_SMPR_SMP_71P5 ADC_SAMPLE_71P5
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# define ADC_SMPR_SMP_239P5 ADC_SAMPLE_239P5
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# endif
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// we still sample at 12bit, but scale down to the requested bit range
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# define ADC_CFGR1_RES_12BIT 12
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# define ADC_CFGR1_RES_10BIT 10
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# define ADC_CFGR1_RES_8BIT 8
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# define ADC_CFGR1_RES_6BIT 6
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#endif
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/* User configurable ADC options */
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#ifndef ADC_COUNT
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# if defined(STM32F0XX) || defined(STM32F1XX) || defined(STM32F4XX)
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# define ADC_COUNT 1
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# elif defined(STM32F3XX)
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# define ADC_COUNT 4
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# else
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# error "ADC_COUNT has not been set for this ARM microcontroller."
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# endif
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#endif
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#ifndef ADC_NUM_CHANNELS
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# define ADC_NUM_CHANNELS 1
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#elif ADC_NUM_CHANNELS != 1
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# error "The ARM ADC implementation currently only supports reading one channel at a time."
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#endif
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#ifndef ADC_BUFFER_DEPTH
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# define ADC_BUFFER_DEPTH 1
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#endif
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// For more sampling rate options, look at hal_adc_lld.h in ChibiOS
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#ifndef ADC_SAMPLING_RATE
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# define ADC_SAMPLING_RATE ADC_SMPR_SMP_1P5
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#endif
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// Options are 12, 10, 8, and 6 bit.
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#ifndef ADC_RESOLUTION
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# ifdef ADC_CFGR_RES_10BITS // ADCv3, ADCv4
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# define ADC_RESOLUTION ADC_CFGR_RES_10BITS
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# else // ADCv1, ADCv5, or the bodge for ADCv2 above
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# define ADC_RESOLUTION ADC_CFGR1_RES_10BIT
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# endif
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#endif
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static ADCConfig adcCfg = {};
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static adcsample_t sampleBuffer[ADC_NUM_CHANNELS * ADC_BUFFER_DEPTH];
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// Initialize to max number of ADCs, set to empty object to initialize all to false.
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static bool adcInitialized[ADC_COUNT] = {};
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// TODO: add back TR handling???
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static ADCConversionGroup adcConversionGroup = {
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.circular = FALSE,
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.num_channels = (uint16_t)(ADC_NUM_CHANNELS),
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#if defined(USE_ADCV1)
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.cfgr1 = ADC_CFGR1_CONT | ADC_RESOLUTION,
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.smpr = ADC_SAMPLING_RATE,
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#elif defined(USE_ADCV2)
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# if !defined(STM32F1XX)
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.cr2 = ADC_CR2_SWSTART, // F103 seem very unhappy with, F401 seems very unhappy without...
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# endif
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.smpr2 = ADC_SMPR2_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN9(ADC_SAMPLING_RATE),
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.smpr1 = ADC_SMPR1_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN15(ADC_SAMPLING_RATE),
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#else
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.cfgr = ADC_CFGR_CONT | ADC_RESOLUTION,
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.smpr = {ADC_SMPR1_SMP_AN0(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN1(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN2(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN3(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN4(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN5(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN6(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN7(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN8(ADC_SAMPLING_RATE) | ADC_SMPR1_SMP_AN9(ADC_SAMPLING_RATE), ADC_SMPR2_SMP_AN10(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN11(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN12(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN13(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN14(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN15(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN16(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN17(ADC_SAMPLING_RATE) | ADC_SMPR2_SMP_AN18(ADC_SAMPLING_RATE)},
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#endif
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};
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// clang-format off
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__attribute__((weak)) adc_mux pinToMux(pin_t pin) {
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switch (pin) {
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#if defined(STM32F0XX)
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case A0: return TO_MUX( ADC_CHSELR_CHSEL0, 0 );
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case A1: return TO_MUX( ADC_CHSELR_CHSEL1, 0 );
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case A2: return TO_MUX( ADC_CHSELR_CHSEL2, 0 );
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case A3: return TO_MUX( ADC_CHSELR_CHSEL3, 0 );
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case A4: return TO_MUX( ADC_CHSELR_CHSEL4, 0 );
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case A5: return TO_MUX( ADC_CHSELR_CHSEL5, 0 );
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case A6: return TO_MUX( ADC_CHSELR_CHSEL6, 0 );
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case A7: return TO_MUX( ADC_CHSELR_CHSEL7, 0 );
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case B0: return TO_MUX( ADC_CHSELR_CHSEL8, 0 );
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case B1: return TO_MUX( ADC_CHSELR_CHSEL9, 0 );
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case C0: return TO_MUX( ADC_CHSELR_CHSEL10, 0 );
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case C1: return TO_MUX( ADC_CHSELR_CHSEL11, 0 );
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case C2: return TO_MUX( ADC_CHSELR_CHSEL12, 0 );
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case C3: return TO_MUX( ADC_CHSELR_CHSEL13, 0 );
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case C4: return TO_MUX( ADC_CHSELR_CHSEL14, 0 );
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case C5: return TO_MUX( ADC_CHSELR_CHSEL15, 0 );
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#elif defined(STM32F3XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN1, 1 );
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case A5: return TO_MUX( ADC_CHANNEL_IN2, 1 );
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case A6: return TO_MUX( ADC_CHANNEL_IN3, 1 );
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case A7: return TO_MUX( ADC_CHANNEL_IN4, 1 );
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case B0: return TO_MUX( ADC_CHANNEL_IN12, 2 );
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case B1: return TO_MUX( ADC_CHANNEL_IN1, 2 );
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case B2: return TO_MUX( ADC_CHANNEL_IN12, 1 );
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case B12: return TO_MUX( ADC_CHANNEL_IN3, 3 );
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case B13: return TO_MUX( ADC_CHANNEL_IN5, 2 );
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case B14: return TO_MUX( ADC_CHANNEL_IN4, 3 );
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case B15: return TO_MUX( ADC_CHANNEL_IN5, 3 );
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case C0: return TO_MUX( ADC_CHANNEL_IN6, 0 ); // Can also be ADC2
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case C1: return TO_MUX( ADC_CHANNEL_IN7, 0 ); // Can also be ADC2
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case C2: return TO_MUX( ADC_CHANNEL_IN8, 0 ); // Can also be ADC2
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case C3: return TO_MUX( ADC_CHANNEL_IN9, 0 ); // Can also be ADC2
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case C4: return TO_MUX( ADC_CHANNEL_IN5, 1 );
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case C5: return TO_MUX( ADC_CHANNEL_IN11, 1 );
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case D8: return TO_MUX( ADC_CHANNEL_IN12, 3 );
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case D9: return TO_MUX( ADC_CHANNEL_IN13, 3 );
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case D10: return TO_MUX( ADC_CHANNEL_IN7, 2 ); // Can also be ADC4
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case D11: return TO_MUX( ADC_CHANNEL_IN8, 2 ); // Can also be ADC4
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case D12: return TO_MUX( ADC_CHANNEL_IN9, 2 ); // Can also be ADC4
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case D13: return TO_MUX( ADC_CHANNEL_IN10, 2 ); // Can also be ADC4
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case D14: return TO_MUX( ADC_CHANNEL_IN11, 2 ); // Can also be ADC4
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case E7: return TO_MUX( ADC_CHANNEL_IN13, 2 );
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case E8: return TO_MUX( ADC_CHANNEL_IN6, 2 ); // Can also be ADC4
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case E9: return TO_MUX( ADC_CHANNEL_IN2, 2 );
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case E10: return TO_MUX( ADC_CHANNEL_IN14, 2 );
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case E11: return TO_MUX( ADC_CHANNEL_IN15, 2 );
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case E12: return TO_MUX( ADC_CHANNEL_IN16, 2 );
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case E13: return TO_MUX( ADC_CHANNEL_IN3, 2 );
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case E14: return TO_MUX( ADC_CHANNEL_IN1, 3 );
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case E15: return TO_MUX( ADC_CHANNEL_IN2, 3 );
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case F2: return TO_MUX( ADC_CHANNEL_IN10, 0 ); // Can also be ADC2
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case F4: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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#elif defined(STM32F4XX)
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case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
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case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
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case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
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case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
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case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
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case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
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case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
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case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
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case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
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case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
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case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
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case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
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case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
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case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
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case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
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case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
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# if STM32_ADC_USE_ADC3
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case F3: return TO_MUX( ADC_CHANNEL_IN9, 2 );
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case F4: return TO_MUX( ADC_CHANNEL_IN14, 2 );
|
|
case F5: return TO_MUX( ADC_CHANNEL_IN15, 2 );
|
|
case F6: return TO_MUX( ADC_CHANNEL_IN4, 2 );
|
|
case F7: return TO_MUX( ADC_CHANNEL_IN5, 2 );
|
|
case F8: return TO_MUX( ADC_CHANNEL_IN6, 2 );
|
|
case F9: return TO_MUX( ADC_CHANNEL_IN7, 2 );
|
|
case F10: return TO_MUX( ADC_CHANNEL_IN8, 2 );
|
|
# endif
|
|
#elif defined(STM32F1XX)
|
|
case A0: return TO_MUX( ADC_CHANNEL_IN0, 0 );
|
|
case A1: return TO_MUX( ADC_CHANNEL_IN1, 0 );
|
|
case A2: return TO_MUX( ADC_CHANNEL_IN2, 0 );
|
|
case A3: return TO_MUX( ADC_CHANNEL_IN3, 0 );
|
|
case A4: return TO_MUX( ADC_CHANNEL_IN4, 0 );
|
|
case A5: return TO_MUX( ADC_CHANNEL_IN5, 0 );
|
|
case A6: return TO_MUX( ADC_CHANNEL_IN6, 0 );
|
|
case A7: return TO_MUX( ADC_CHANNEL_IN7, 0 );
|
|
case B0: return TO_MUX( ADC_CHANNEL_IN8, 0 );
|
|
case B1: return TO_MUX( ADC_CHANNEL_IN9, 0 );
|
|
case C0: return TO_MUX( ADC_CHANNEL_IN10, 0 );
|
|
case C1: return TO_MUX( ADC_CHANNEL_IN11, 0 );
|
|
case C2: return TO_MUX( ADC_CHANNEL_IN12, 0 );
|
|
case C3: return TO_MUX( ADC_CHANNEL_IN13, 0 );
|
|
case C4: return TO_MUX( ADC_CHANNEL_IN14, 0 );
|
|
case C5: return TO_MUX( ADC_CHANNEL_IN15, 0 );
|
|
// STM32F103x[C-G] in 144-pin packages also have analog inputs on F6...F10, but they are on ADC3, and the
|
|
// ChibiOS ADC driver for STM32F1xx currently supports only ADC1, therefore these pins are not usable.
|
|
#endif
|
|
}
|
|
|
|
// return an adc that would never be used so intToADCDriver will bail out
|
|
return TO_MUX(0, 0xFF);
|
|
}
|
|
// clang-format on
|
|
|
|
static inline ADCDriver* intToADCDriver(uint8_t adcInt) {
|
|
switch (adcInt) {
|
|
#if STM32_ADC_USE_ADC1
|
|
case 0:
|
|
return &ADCD1;
|
|
#endif
|
|
#if STM32_ADC_USE_ADC2
|
|
case 1:
|
|
return &ADCD2;
|
|
#endif
|
|
#if STM32_ADC_USE_ADC3
|
|
case 2:
|
|
return &ADCD3;
|
|
#endif
|
|
#if STM32_ADC_USE_ADC4
|
|
case 3:
|
|
return &ADCD4;
|
|
#endif
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static inline void manageAdcInitializationDriver(uint8_t adc, ADCDriver* adcDriver) {
|
|
if (!adcInitialized[adc]) {
|
|
adcStart(adcDriver, &adcCfg);
|
|
adcInitialized[adc] = true;
|
|
}
|
|
}
|
|
|
|
int16_t analogReadPin(pin_t pin) {
|
|
palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
|
|
|
|
return adc_read(pinToMux(pin));
|
|
}
|
|
|
|
int16_t analogReadPinAdc(pin_t pin, uint8_t adc) {
|
|
palSetLineMode(pin, PAL_MODE_INPUT_ANALOG);
|
|
|
|
adc_mux target = pinToMux(pin);
|
|
target.adc = adc;
|
|
return adc_read(target);
|
|
}
|
|
|
|
int16_t adc_read(adc_mux mux) {
|
|
#if defined(USE_ADCV1)
|
|
// TODO: fix previous assumption of only 1 input...
|
|
adcConversionGroup.chselr = 1 << mux.input; /*no macro to convert N to ADC_CHSELR_CHSEL1*/
|
|
#elif defined(USE_ADCV2)
|
|
adcConversionGroup.sqr3 = ADC_SQR3_SQ1_N(mux.input);
|
|
#else
|
|
adcConversionGroup.sqr[0] = ADC_SQR1_SQ1_N(mux.input);
|
|
#endif
|
|
|
|
ADCDriver* targetDriver = intToADCDriver(mux.adc);
|
|
if (!targetDriver) {
|
|
return 0;
|
|
}
|
|
|
|
manageAdcInitializationDriver(mux.adc, targetDriver);
|
|
if (adcConvert(targetDriver, &adcConversionGroup, &sampleBuffer[0], ADC_BUFFER_DEPTH) != MSG_OK) {
|
|
return 0;
|
|
}
|
|
|
|
#ifdef USE_ADCV2
|
|
// fake 12-bit -> N-bit scale
|
|
return (*sampleBuffer) >> (12 - ADC_RESOLUTION);
|
|
#else
|
|
// already handled as part of adcConvert
|
|
return *sampleBuffer;
|
|
#endif
|
|
}
|