6 Commits

Author SHA1 Message Date
b12ad6fba6 Use build matrix
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CI/CD / Lint and Test (push) Successful in 1m13s
CI/CD / Build firmware (heltec_v3) (push) Successful in 2m3s
CI/CD / Build firmware (seeed_xiao_s3_wio_sx1262) (push) Successful in 4m0s
CI/CD / Build Summary (push) Successful in 4s
2026-03-30 09:40:35 +02:00
Maze X
cb02cf229d Replace matrix strategy with explicit parallel build jobs
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CI/CD / Lint and Test (push) Successful in 24s
CI/CD / Build heltec_v3 (push) Failing after 1m0s
CI/CD / Build seeed_xiao_s3_wio_sx1262 (push) Failing after 51s
CI/CD / Publish Packages (push) Has been skipped
CI/CD / Build Summary (push) Failing after 2s
- Create separate build-heltec-v3 and build-seeed-xiao jobs
- Both build jobs run in parallel after verify completes
- Explicit job dependencies ensure guaranteed parallelization
- Each job has its own PlatformIO cache key for better hit rates
2026-03-27 18:09:28 +01:00
Maze X
fdd1802bd5 Restructure CI pipeline for proper sequencing and parallelization
- Merge lint and test into single 'verify' job for guaranteed sequential execution
- Build job runs in parallel for each target, but waits for verify to complete
- Ensures order: verify (lint → test) → build (parallel) → publish-packages
- Fixes Gitea Actions job dependency handling
2026-03-27 18:08:42 +01:00
Maze X
bd2f990754 Add firmware artifact collection and Gitea package publishing
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Build Matrix / Build (esp32s3, Heltec WiFi LoRa 32 V3 (ESP32-S3, SX1262), heltec_v3) (push) Has been cancelled
CI/CD / Unit Tests (push) Has been cancelled
CI/CD / Build heltec_v3 (push) Has been cancelled
CI/CD / Build seeed_xiao_s3_wio_sx1262 (push) Has been cancelled
CI/CD / Publish Packages (push) Has been cancelled
CI/CD / Build Summary (push) Has been cancelled
- Upload firmware binaries as build artifacts (5-day retention)
- Add publish-packages job to collect, rename with timestamp, and publish to Gitea
- Firmware named as: board-<unix-timestamp>.bin
- Publishes to Gitea generic package registry only on main branch push
- Include package publishing in CI summary status check
2026-03-27 18:06:28 +01:00
Maze X
a72e2f01ff Update CI pipeline: enforce lint → test → build order and reduce targets
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Build Matrix / Build (esp32s3, Heltec WiFi LoRa 32 V3 (ESP32-S3, SX1262), heltec_v3) (push) Failing after 12s
CI/CD / Unit Tests (push) Has been cancelled
CI/CD / Lint and Format Check (push) Has been cancelled
CI/CD / Build heltec_v3 (push) Has been cancelled
CI/CD / Build seeed_xiao_s3_wio_sx1262 (push) Has been cancelled
CI/CD / Build Summary (push) Has been cancelled
Build Matrix / Build (esp32s3, Seeed XIAO ESP32-S3 + Wio SX1262, seeed_xiao_s3_wio_sx1262) (push) Has been cancelled
- Reorder CI jobs to run sequentially: lint, then test, then build
- Remove all unimplemented build targets, keeping only heltec_v3 and seeed_xiao_s3_wio_sx1262
- Update job dependencies with 'needs' to ensure proper execution order
2026-03-27 18:02:27 +01:00
Maze X
f7bd449e6f Add Gitea Actions CI/CD infrastructure with build matrix
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Build Matrix / Build (esp32, Heltec CT62 (ESP32, SX1262), heltec_ct62) (push) Failing after 1m26s
Build Matrix / Build (esp32, Heltec E213 (ESP32, SX1262), heltec_e213) (push) Failing after 10s
Build Matrix / Build (esp32, Heltec E290 (ESP32, SX1262), heltec_e290) (push) Failing after 14s
Build Matrix / Build (esp32, Heltec Mesh Solar (ESP32, SX1262), heltec_mesh_solar) (push) Failing after 10s
Build Matrix / Build (esp32, Heltec T190 (ESP32, SX1262), heltec_t190) (push) Failing after 11s
Build Matrix / Build (esp32, LilyGo T-Beam 1W (ESP32, SX1262), lilygo_t_beam_1w) (push) Has been cancelled
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Build Matrix / Build (esp32, LilyGo T-Beam SX1276 (ESP32, SX1276), lilygo_t_beam_sx1276) (push) Has been cancelled
Build Matrix / Build (esp32s3, Heltec T114 (ESP32-S3, SX1262), heltec_t114) (push) Has been cancelled
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Build Matrix / Build (esp32s3, LilyGo T-Beam Supreme (ESP32-S3, SX1262), lilygo_t_beam_supreme) (push) Has been cancelled
Build Matrix / Build (esp32s3, Seeed XIAO ESP32-S3 + Wio SX1262, seeed_xiao_s3_wio_sx1262) (push) Has been cancelled
Build Matrix / Build (nrf52, RAK3112 (nRF52840, SX1262), rak_rak3112) (push) Has been cancelled
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Build Matrix / Build (rp2040, RAK11310 (RP2040, SX1262), rak_rak11310) (push) Has been cancelled
CI/CD / Lint and Format Check (push) Successful in 28s
CI/CD / Build heltec_ct62 (push) Failing after 11s
CI/CD / Build heltec_e213 (push) Failing after 9s
CI/CD / Build heltec_e290 (push) Failing after 9s
CI/CD / Build heltec_mesh_solar (push) Failing after 9s
CI/CD / Build heltec_t114 (push) Failing after 9s
CI/CD / Build heltec_t190 (push) Failing after 9s
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CI/CD / Build heltec_v2 (push) Has been cancelled
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CI/CD / Build heltec_v3 (push) Has been cancelled
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- Main CI pipeline (.gitea/workflows/ci.yml): Runs linting, builds all 21 targets, executes unit tests, and reports overall status
- Detailed build matrix (.gitea/workflows/build-matrix.yml): Per-target build configuration with descriptions and chip architecture metadata; parallel builds with SoC-specific caching
- CI_CD.md documentation: Comprehensive guide covering workflow descriptions, all 21 hardware targets, local testing commands, cache strategy, and troubleshooting

All 21 supported boards now build in CI:
- Heltec: v2, v3, v4, T114, CT62, E213, E290, Mesh Solar, T190, Tracker, Tracker V2
- LilyGo: T-Beam 1W, Supreme, SX1262, SX1276
- RAK: RAK4631, RAK3112, RAK3401, RAK3x72, RAK11310
- Seeed: XIAO S3 + Wio SX1262

Verified: Seeed and Heltec V3 targets build successfully with all chip-specific configurations.
2026-03-27 17:53:08 +01:00