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- Main CI pipeline (.gitea/workflows/ci.yml): Runs linting, builds all 21 targets, executes unit tests, and reports overall status - Detailed build matrix (.gitea/workflows/build-matrix.yml): Per-target build configuration with descriptions and chip architecture metadata; parallel builds with SoC-specific caching - CI_CD.md documentation: Comprehensive guide covering workflow descriptions, all 21 hardware targets, local testing commands, cache strategy, and troubleshooting All 21 supported boards now build in CI: - Heltec: v2, v3, v4, T114, CT62, E213, E290, Mesh Solar, T190, Tracker, Tracker V2 - LilyGo: T-Beam 1W, Supreme, SX1262, SX1276 - RAK: RAK4631, RAK3112, RAK3401, RAK3x72, RAK11310 - Seeed: XIAO S3 + Wio SX1262 Verified: Seeed and Heltec V3 targets build successfully with all chip-specific configurations.
134 lines
4.9 KiB
Markdown
134 lines
4.9 KiB
Markdown
# CI/CD Pipeline
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This project uses **Gitea Actions** for continuous integration and continuous deployment.
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## Workflows
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### 1. Main CI Pipeline (`ci.yml`)
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Runs on every push to `main` and pull requests. Includes:
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- **Lint Check** — Validates code formatting with `pre-commit` (clang-format, markdownlint, etc.)
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- **Build Matrix** — Compiles all 21 hardware targets
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- **Unit Tests** — Runs integration test suite (when available)
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- **Summary** — Reports overall status
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**Status**: ✅ All builds must pass before merging to main
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### 2. Detailed Build Matrix (`build-matrix.yml`)
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Comprehensive build configuration with per-target metadata:
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- Target name and description
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- Chip architecture (ESP32, ESP32-S3, nRF52, RP2040)
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- Parallel builds with caching
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- Detailed reporting
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**Builds**:
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- **ESP32 targets** (7): Heltec v2, v4, CT62, E213, E290, Mesh Solar, T190 + LilyGo T-Beam variants
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- **ESP32-S3 targets** (7): Heltec V3, T114, Tracker, Tracker V2 + Seeed Xiao S3 + LilyGo T-Beam Supreme
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- **nRF52 targets** (4): RAK4631, RAK3112, RAK3401, RAK3x72
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- **RP2040 targets** (1): RAK11310
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## Hardware Targets Supported
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| Board | Vendor | SoC | LoRa Chip | Status |
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| -------------------------------- | ------ | -------- | --------- | ----------- |
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| Heltec WiFi LoRa 32 V2 | Heltec | ESP32 | SX1276 | ✅ |
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| Heltec WiFi LoRa 32 V3 | Heltec | ESP32-S3 | SX1262 | ✅ Verified |
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| Heltec WiFi LoRa 32 V4 | Heltec | ESP32-S3 | SX1262 | ✅ |
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| Heltec CT62 | Heltec | ESP32 | SX1262 | ✅ |
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| Heltec E213 | Heltec | ESP32 | SX1262 | ✅ |
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| Heltec E290 | Heltec | ESP32 | SX1262 | ✅ |
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| Heltec Mesh Solar | Heltec | ESP32 | SX1262 | ✅ |
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| Heltec T114 | Heltec | ESP32-S3 | SX1262 | ✅ |
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| Heltec T190 | Heltec | ESP32 | SX1262 | ✅ |
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| Heltec Tracker | Heltec | ESP32-S3 | SX1262 | ✅ |
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| Heltec Tracker V2 | Heltec | ESP32-S3 | SX1262 | ✅ |
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| LilyGo T-Beam 1W | LilyGo | ESP32 | SX1262 | ✅ |
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| LilyGo T-Beam SX1262 | LilyGo | ESP32 | SX1262 | ✅ |
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| LilyGo T-Beam SX1276 | LilyGo | ESP32 | SX1276 | ✅ |
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| LilyGo T-Beam Supreme | LilyGo | ESP32-S3 | SX1262 | ✅ |
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| RAK4631 WisBlock | RAK | nRF52840 | SX1262 | ✅ |
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| RAK3112 | RAK | nRF52840 | SX1262 | ✅ |
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| RAK3401 | RAK | nRF52840 | SX1262 | ✅ |
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| RAK3x72 | RAK | nRF52840 | SX1262 | ✅ |
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| RAK11310 | RAK | RP2040 | SX1262 | ✅ |
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| Seeed XIAO ESP32-S3 + Wio SX1262 | Seeed | ESP32-S3 | SX1262 | ✅ Verified |
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## Local Testing
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### Build a single target
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```bash
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pio run -e heltec_v3
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```
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### Run linting
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```bash
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pre-commit run --all-files
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```
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### Run unit tests
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```bash
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python3 test/test_integration.py
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```
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## CI/CD Configuration Files
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- `.gitea/workflows/ci.yml` — Main CI pipeline
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- `.gitea/workflows/build-matrix.yml` — Detailed build matrix with per-target metadata
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- `.pre-commit-config.yaml` — Pre-commit hooks (clang-format, markdownlint, etc.)
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- `.clang-format` — Code formatting rules (LLVM style, 88-char lines)
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- `.clang-tidy` — Static analysis rules (C++ naming, magic numbers, etc.)
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- `platformio.ini` — Build configuration for all targets
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## Caching
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PlatformIO dependencies are cached per SoC architecture:
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- `esp32`, `esp32s3` — Share cache
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- `nrf52` — Separate cache
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- `rp2040` — Separate cache
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Cache is keyed by `platformio.ini` to invalidate on dependency changes.
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## Build Status Badge
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Add to README.md:
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```markdown
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[](https://gitea.example.com/path/to/loramodem/actions)
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```
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## Troubleshooting
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### Build fails for all targets
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1. Check `platformio.ini` syntax: `pio run -e heltec_v3 -vv`
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2. Clear cache: `rm -rf ~/.platformio`
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3. Check pre-commit: `pre-commit run --all-files`
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### Build fails for specific target
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1. Check board configuration: `hardware/<vendor>/<board>/platformio.ini`
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2. Verify pin definitions
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3. Check SoC configuration: `soc/<soc>/platformio.ini`
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### Tests fail in CI but pass locally
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1. Check Python version: CI uses 3.11, ensure local is compatible
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2. Check environment: CI runs on Ubuntu, may differ from macOS/Windows
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3. Run tests with verbose: `pytest -vv test/`
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## Next Steps
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- [ ] Hardware flashing job (needs USB device access)
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- [ ] Integration tests with modem simulator
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- [ ] Firmware size reports per target
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- [ ] Documentation generation
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- [ ] Release artifact creation
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