Add XIAO Wio-SX1262 overlay; support SX12xx bandwidths (including 62.5 kHz) as default

- boards/seeed/xiao_wio_sx1262: add overlay, .conf, board.yml
- app: support full set of SX12xx bandwidths; default BW set to 62 (62.5 kHz)
- Update Kconfig and prj.conf
- Update lora_modem.h/c for validation and mapping
This commit is contained in:
2026-03-26 13:01:47 +01:00
parent d074cd2e43
commit 45d1364a71
926 changed files with 174514 additions and 26 deletions

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@@ -2,6 +2,5 @@ board:
name: heltec_meshpocket
full_name: "Heltec MeshPocket"
vendor: heltec
url: https://heltec.org/project/mesh-pocket/
socs:
- name: nrf52840

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@@ -2,6 +2,5 @@ board:
name: heltec_t114
full_name: "Heltec Mesh Node T114"
vendor: heltec
url: https://heltec.org/project/mesh-node-t114/
socs:
- name: nrf52840

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@@ -2,7 +2,6 @@ board:
name: heltec_wifi_lora32_v3
full_name: "Heltec WiFi LoRa 32 V3"
vendor: heltec
url: https://heltec.org/project/wifi-lora-32-v3/
socs:
- name: esp32s3
variants:

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@@ -2,7 +2,6 @@ board:
name: heltec_wifi_lora32_v4
full_name: "Heltec WiFi LoRa 32 V4"
vendor: heltec
url: https://heltec.org/project/wifi-lora-32-v4/
socs:
- name: esp32s3
variants:

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@@ -2,7 +2,6 @@ board:
name: lilygo_tbeam
full_name: "LilyGo T-Beam"
vendor: lilygo
url: https://www.lilygo.cc/products/t-beam-v1-1
socs:
- name: esp32
variants:

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@@ -0,0 +1,7 @@
# LilyGO TTGO LoRa32 — ESP32 + SX127x
# Uses hardware UART over onboard USB-Serial bridge
CONFIG_LORAMODEM_KISS_IFACE_UART=y
# SX127x driver (via loramac-node)
CONFIG_LORA_SX12XX=y

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@@ -0,0 +1,11 @@
/*
* LilyGO TTGO LoRa32 — application DTS overlay
* KISS interface: UART0 (via onboard USB-Serial bridge)
* LoRa: SX127x on SPI (assumed present in upstream board DTS)
*/
/ {
chosen {
loramodem,kiss-uart = &uart0;
};
};

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@@ -2,6 +2,5 @@ board:
name: rak_wismesh_pocket
full_name: "RAK WisMesh Pocket"
vendor: rak
url: https://docs.rakwireless.com/Product-Categories/WisMesh/
socs:
- name: nrf52840

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@@ -2,6 +2,5 @@ board:
name: rak_wismesh_tag
full_name: "RAK WisMesh Tag"
vendor: rak
url: https://docs.rakwireless.com/Product-Categories/WisMesh/
socs:
- name: nrf52840

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@@ -2,6 +2,5 @@ board:
name: seeed_wio_tracker
full_name: "Seeed Wio Tracker 1110"
vendor: seeed
url: https://wiki.seeedstudio.com/wio_tracker_1110_intro/
socs:
- name: nrf52840

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@@ -0,0 +1,11 @@
board:
name: xiao_wio_sx1262
full_name: "Seeed XIAO ESP32-S3 + Wio-SX1262"
vendor: seeed
socs:
- name: esp32s3
variants:
- name: procpu
cpucluster: procpu
- name: appcpu
cpucluster: appcpu

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@@ -0,0 +1,5 @@
# Seeed XIAO ESP32S3 + Wio-SX1262
# KISS over USB CDC, enable generic SX12XX support (SX127x/SX126x family)
CONFIG_LORAMODEM_KISS_IFACE_USB=y
CONFIG_LORA_SX12XX=y

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@@ -0,0 +1,55 @@
/*
* Seeed XIAO ESP32S3 + Wio-SX1262 — application DTS overlay
* KISS interface: USB CDC-ACM
* LoRa: SX1262 on SPI (wiring based on user-provided mappings)
*
* Pin mapping (logical Dx -> GPIO number assumed equal):
* MOSI = D10 -> gpio0 10
* MISO = D9 -> gpio0 9
* SCK = D8 -> gpio0 8
* NSS = D3 -> gpio0 3
* DIO1 = D0 -> gpio0 0
* BUSY = D1 -> gpio0 1
* RST = D2 -> gpio0 2
* RF-SW= D4 -> gpio0 4
*/
/ {
chosen {
loramodem,kiss-uart = &usb_serial;
};
aliases {
lora0 = &lora;
};
};
/* Enable SPI2 and attach SX1262 on CS=D3 */
&spi2 {
status = "okay";
#address-cells = <1>;
#size-cells = <0>;
pinctrl-0 = <&spim2_default>;
pinctrl-names = "default";
cs-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
lora: lora@0 {
compatible = "semtech,sx1262";
reg = <0>;
spi-max-frequency = <4000000>;
reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
busy-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
dio1-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
dio2-tx-enable;
/* RF switch (optional): high = TX */
tx-enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
/* If the module requires TCXO configuration, add dio3-tcxo-voltage */
};
};
&gpio0 {
status = "okay";
};
&gpio1 {
status = "okay";
};

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@@ -2,6 +2,5 @@ board:
name: sensecap_t1000e
full_name: "SenseCAP T1000-E"
vendor: sensecap
url: https://www.seeedstudio.com/SenseCAP-Card-Tracker-T1000-E-p-5913.html
socs:
- name: nrf52840