Add XIAO Wio-SX1262 overlay; support SX12xx bandwidths (including 62.5 kHz) as default

- boards/seeed/xiao_wio_sx1262: add overlay, .conf, board.yml
- app: support full set of SX12xx bandwidths; default BW set to 62 (62.5 kHz)
- Update Kconfig and prj.conf
- Update lora_modem.h/c for validation and mapping

boards/seeed/xiao_wio_sx1262/xiao_wio_sx1262.overlay

@@ -0,0 +1,55 @@
+/*
+ * Seeed XIAO ESP32S3 + Wio-SX1262 — application DTS overlay
+ * KISS interface: USB CDC-ACM
+ * LoRa: SX1262 on SPI (wiring based on user-provided mappings)
+ *
+ * Pin mapping (logical Dx -> GPIO number assumed equal):
+ *  MOSI = D10 -> gpio0 10
+ *  MISO = D9  -> gpio0 9
+ *  SCK  = D8  -> gpio0 8
+ *  NSS  = D3  -> gpio0 3
+ *  DIO1 = D0  -> gpio0 0
+ *  BUSY = D1  -> gpio0 1
+ *  RST  = D2  -> gpio0 2
+ *  RF-SW= D4  -> gpio0 4
+ */
+
+/ {
+	chosen {
+		loramodem,kiss-uart = &usb_serial;
+	};
+	aliases {
+		lora0 = &lora;
+	};
+};
+
+/* Enable SPI2 and attach SX1262 on CS=D3 */
+&spi2 {
+	status = "okay";
+	#address-cells = <1>;
+	#size-cells = <0>;
+	pinctrl-0 = <&spim2_default>;
+	pinctrl-names = "default";
+	cs-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
+
+	lora: lora@0 {
+		compatible = "semtech,sx1262";
+		reg = <0>;
+		spi-max-frequency = <4000000>;
+		reset-gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
+		busy-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
+		dio1-gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
+		dio2-tx-enable;
+		/* RF switch (optional): high = TX */
+		tx-enable-gpios = <&gpio0 4 GPIO_ACTIVE_HIGH>;
+		/* If the module requires TCXO configuration, add dio3-tcxo-voltage */
+	};
+};
+
+&gpio0 {
+	status = "okay";
+};
+
+&gpio1 {
+	status = "okay";
+};